1. Pierre Surply
  2. Mara

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Pierre Surply  committed 51fa682

Added 1280 ports (E, F, G, H, K and L)

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  • Parent commits 45d9fcc
  • Branches master

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Files changed (2)

File compiler/builtins/builtins.ml

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 **    along with Mara.  If not, see <http://www.gnu.org/licenses/>.
 **
 ** Started on  Sat Jan  5 20:17:14 2013 Pierre Surply
-** Last update Sun Jan 20 12:08:50 2013 Pierre Surply
+** Last update Sat May 11 14:48:03 2013 Pierre Surply
 *)
 
 let builtins =
     [("PORTA", Io.io);
      ("PORTB", Io.io);
      ("PORTC", Io.io);
-     ("PORTD", Io.io)];
+     ("PORTD", Io.io);
+     ("PORTE", Io.io);
+     ("PORTF", Io.io);
+     ("PORTG", Io.io);
+     ("PORTK", Io.io);
+     ("PORTL", Io.io)];
   h
 
 let call_builtins = function
   | "PORTA" | "PORTB"
-  | "PORTC" | "PORTD" as s -> Io.call_io s
+  | "PORTC" | "PORTD"
+  | "PORTE" | "PORTF"
+  | "PORTG" | "PORTK" 
+  | "PORTL" as s -> Io.call_io s
   | _ -> raise Not_found

File compiler/builtins/io.ml

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 **    along with Mara.  If not, see <http://www.gnu.org/licenses/>.
 **
 ** Started on  Sat Jan  5 20:28:08 2013 Pierre Surply
-** Last update Sun Jan 20 12:08:55 2013 Pierre Surply
+** Last update Sat May 11 15:26:15 2013 Pierre Surply
 *)
 
 open Ast
 open Asm
 open Print_asm
 
+let get_ddr = function
+   "PORTA" -> "DDRA"
+ | "PORTB" -> "DDRB"
+ | "PORTC" -> "DDRC"
+ | "PORTD" -> "DDRD"
+ | "PORTE" -> "DDRE"
+ | "PORTF" -> "DDRF"
+ | "PORTG" -> "DDRG"
+ | "PORTK" -> "DDRK"
+ | "PORTL" -> "DDRL"
+ | _       -> ""
+
+let get_pin = function
+   "PORTA" -> "PINA"
+ | "PORTB" -> "PINB"
+ | "PORTC" -> "PINC"
+ | "PORTD" -> "PIND"
+ | "PORTE" -> "PINE"
+ | "PORTF" -> "PINF"
+ | "PORTG" -> "PING"
+ | "PORTK" -> "PINK"
+ | "PORTL" -> "PINL"
+ | _       -> ""
+
+let lower = function
+  | "PORTA" | "PORTB"
+  | "PORTC" | "PORTD" -> true
+  | _ -> false
+
 let set_mode port loc el =
-  let ddrx = match port with
-    | "PORTA" -> "DDRA"
-    | "PORTB" -> "DDRB"
-    | "PORTC" -> "DDRC"
-    | "PORTD" -> "DDRD"
-    | _       -> ""
-  in
+  let ddrx = get_ddr port in
+  let l = lower port in
   Asm(Some (List.hd el),
-      Printf.sprintf "out  \t%s, r24" ddrx, loc)
+      (if l then
+	Printf.sprintf "out  \t%s, r24" ddrx
+      else
+	Printf.sprintf "sts  \t%s, r24" ddrx), loc)
 
 let write port loc el =
+  let l = lower port in
   Asm(Some (List.hd el),
-      Printf.sprintf "out  \t%s, r24" port, loc)
+      (if l then
+        Printf.sprintf "out  \t%s, r24" port
+       else
+        Printf.sprintf "sts  \t%s, r24" port), loc)
 
 let read port loc el =
-  let pinx = match port with
-    | "PORTA" -> "PINA"
-    | "PORTB" -> "PINB"
-    | "PORTC" -> "PINC"
-    | "PORTD" -> "PIND"
-    | _       -> ""
-  in
+  let pinx = get_pin port in
   Asm(None,
       Printf.sprintf "in  \tr24, %s
 \tclr  \tr25" pinx, loc)
 
 let read_pin port loc el =
-  let ddrx = match port with
-    | "PORTA" -> "PINA"
-    | "PORTB" -> "PINB"
-    | "PORTC" -> "PINC"
-    | "PORTD" -> "PIND"
-    | _       -> ""
-  in
+  let pinx = get_pin port in
   BinOp ("&",
 	 BinOp (">>",
 		Asm(None,
-		    Printf.sprintf "in  \tr24, %s" ddrx,
+		    Printf.sprintf "in  \tr24, %s" pinx,
 		    loc),
 		List.hd el,
 		loc),
       Printf.sprintf "out  \t%s, r24" port, loc)
 
 let pin_out port loc el =
-  let ddrx = match port with
-    | "PORTA" -> "DDRA"
-    | "PORTB" -> "DDRB"
-    | "PORTC" -> "DDRC"
-    | "PORTD" -> "DDRD"
-    | _       -> ""
-  in
+  let ddrx = get_ddr port in
   Asm(Some (BinOp ("|",
 		   Asm(None,
 		       Printf.sprintf "in  \tr24, %s" ddrx,
       Printf.sprintf "out  \t%s, r24" ddrx, loc)
 
 let pin_in port loc el =
-  let ddrx = match port with
-    | "PORTA" -> "DDRA"
-    | "PORTB" -> "DDRB"
-    | "PORTC" -> "DDRC"
-    | "PORTD" -> "DDRD"
-    | _       -> ""
-  in
+  let ddrx = get_ddr port in
   Asm(Some (BinOp ("&",
 		   Asm(None,
 		       Printf.sprintf "in  \tr24, %s" ddrx,