1. Dario Bertini
  2. another-pypy

Commits

David Schneider  committed c8a2911

some register allocation related fixes

  • Participants
  • Parent commits b54b162
  • Branches arm-backed-float

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Files changed (2)

File pypy/jit/backend/arm/assembler.py

View file
  • Ignore whitespace
             self.mc.PUSH([loc.value])
         elif loc.is_vfp_reg():
             self.mc.VPUSH([loc.value])
+        elif loc.is_imm():
+            self.regalloc_mov(loc, r.ip)
+            self.mc.PUSH([r.ip.value])
         else:
             assert 0, 'ffuu'
 

File pypy/jit/backend/arm/regalloc.py

View file
  • Ignore whitespace
             i += 1
             if loc.is_reg():
                 self.rm.reg_bindings[arg] = loc
-            elif loc.is_vfp_reg:
+            elif loc.is_vfp_reg():
                 self.vfprm.reg_bindings[arg] = loc
             else:
                 assert loc.is_stack()
             box = thing
         return loc, box
 
-
-
+    def _sync_var(self, v):
+        if v.type == FLOAT:
+            self.vfprm._sync_var(v)
+        else:
+            self.rm._sync_var(v)
 
     def prepare_op_int_add(self, op, fcond):
         boxes = list(op.getarglist())