35#ifndef _BLAZE_MATH_SIMD_DIV_H_
36#define _BLAZE_MATH_SIMD_DIV_H_
68#if BLAZE_SVML_MODE && BLAZE_AVX512BW_MODE
70 return _mm512_div_epi8( a.value, b.value );
72#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
74 return _mm256_div_epi8( a.value, b.value );
94#if BLAZE_SVML_MODE && BLAZE_AVX512BW_MODE
96 return _mm512_div_epu8( a.value, b.value );
98#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
100 return _mm256_div_epu8( a.value, b.value );
120#if BLAZE_SVML_MODE && BLAZE_AVX512BW_MODE
122 return _mm512_div_epi8( a.value, b.value );
124#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
126 return _mm256_div_epi8( a.value, b.value );
146#if BLAZE_SVML_MODE && BLAZE_AVX512BW_MODE
148 return _mm512_div_epu8( a.value, b.value );
150#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
152 return _mm256_div_epu8( a.value, b.value );
180#if BLAZE_SVML_MODE && BLAZE_AVX512BW_MODE
182 return _mm512_div_epi16( a.value, b.value );
184#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
186 return _mm256_div_epi16( a.value, b.value );
206#if BLAZE_SVML_MODE && BLAZE_AVX512BW_MODE
208 return _mm512_div_epu16( a.value, b.value );
210#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
212 return _mm256_div_epu16( a.value, b.value );
232#if BLAZE_SVML_MODE && BLAZE_AVX512BW_MODE
234 return _mm512_div_epi16( a.value, b.value );
236#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
238 return _mm256_div_epi16( a.value, b.value );
258#if BLAZE_SVML_MODE && BLAZE_AVX512BW_MODE
260 return _mm512_div_epu16( a.value, b.value );
262#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
264 return _mm256_div_epu16( a.value, b.value );
292#if BLAZE_SVML_MODE && ( BLAZE_AVX512F_MODE || BLAZE_MIC_MODE )
294 return _mm512_div_epi32( a.value, b.value );
296#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
298 return _mm256_div_epi32( a.value, b.value );
318#if BLAZE_SVML_MODE && ( BLAZE_AVX512F_MODE || BLAZE_MIC_MODE )
320 return _mm512_div_epu32( a.value, b.value );
322#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
324 return _mm256_div_epu32( a.value, b.value );
344#if BLAZE_SVML_MODE && ( BLAZE_AVX512F_MODE || BLAZE_MIC_MODE )
346 return _mm512_div_epi32( a.value, b.value );
348#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
350 return _mm256_div_epi32( a.value, b.value );
370#if BLAZE_SVML_MODE && ( BLAZE_AVX512F_MODE || BLAZE_MIC_MODE )
372 return _mm512_div_epu32( a.value, b.value );
374#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
376 return _mm256_div_epu32( a.value, b.value );
404#if BLAZE_SVML_MODE && ( BLAZE_AVX512F_MODE || BLAZE_MIC_MODE )
406 return _mm512_div_epi64( a.value, b.value );
408#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
410 return _mm256_div_epi64( a.value, b.value );
430#if BLAZE_SVML_MODE && ( BLAZE_AVX512F_MODE || BLAZE_MIC_MODE )
432 return _mm512_div_epu64( a.value, b.value );
434#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
436 return _mm256_div_epu64( a.value, b.value );
456#if BLAZE_SVML_MODE && ( BLAZE_AVX512F_MODE || BLAZE_MIC_MODE )
458 return _mm512_div_epi64( a.value, b.value );
460#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
462 return _mm256_div_epi64( a.value, b.value );
482#if BLAZE_SVML_MODE && ( BLAZE_AVX512F_MODE || BLAZE_MIC_MODE )
484 return _mm512_div_epu64( a.value, b.value );
486#elif BLAZE_SVML_MODE && BLAZE_AVX2_MODE
488 return _mm256_div_epu64( a.value, b.value );
517 operator/(
const SIMDf32<T1>& a,
const SIMDf32<T2>& b )
noexcept
518#if BLAZE_AVX512F_MODE || BLAZE_MIC_MODE
520 return _mm512_div_ps( (*a).eval().value, (*b).eval().value );
524 return _mm256_div_ps( (*a).eval().value, (*b).eval().value );
528 return _mm_div_ps( (*a).eval().value, (*b).eval().value );
548#if BLAZE_AVX512F_MODE || BLAZE_MIC_MODE
550 return _mm512_div_ps( a.value, b.value );
554 return _mm256_div_ps( a.value, b.value );
558 return _mm_div_ps( a.value, b.value );
587 operator/(
const SIMDf64<T1>& a,
const SIMDf64<T2>& b )
noexcept
588#if BLAZE_AVX512F_MODE || BLAZE_MIC_MODE
590 return _mm512_div_pd( (*a).eval().value, (*b).eval().value );
594 return _mm256_div_pd( (*a).eval().value, (*b).eval().value );
598 return _mm_div_pd( (*a).eval().value, (*b).eval().value );
618#if BLAZE_AVX512F_MODE || BLAZE_MIC_MODE
620 return _mm512_div_pd( a.value, b.value );
624 return _mm256_div_pd( a.value, b.value );
628 return _mm_div_pd( a.value, b.value );
Header file for the basic SIMD types.
SIMD type for 64-bit double precision complex values.
SIMD type for 32-bit single precision complex values.
SIMD type for 16-bit signed integral complex values.
SIMD type for 32-bit signed integral complex values.
SIMD type for 64-bit signed integral complex values.
SIMD type for 8-bit signed integral complex values.
SIMD type for 16-bit unsigned integral complex values.
SIMD type for 32-bit unsigned integral complex values.
SIMD type for 64-bit unsigned integral complex values.
SIMD type for 8-bit unsigned integral complex values.
SIMD type for 64-bit double precision floating point data values.
SIMD type for 32-bit single precision floating point data values.
SIMD type for 16-bit signed integral data values.
SIMD type for 32-bit signed integral data values.
SIMD type for 64-bit integral data values.
SIMD type for 8-bit signed integral data values.
SIMD type for 16-bit unsigned integral data values.
SIMD type for 32-bit unsigned integral data values.
SIMD type for 64-bit unsigned integral data values.
SIMD type for 8-bit unsigned integral data values.
BLAZE_ALWAYS_INLINE const SIMDcdouble operator/(const SIMDcdouble &a, const SIMDdouble &b) noexcept=delete
Scaling of a vector of double precision floating point values complex SIMD values.
#define BLAZE_ALWAYS_INLINE
Platform dependent setup of an enforced inline keyword.
Definition: Inline.h:85
System settings for the inline keywords.
System settings for the SSE mode.