Commits

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Author Commit Message Labels Comments Date
Owen Anderson
Hook up support for fast-isel of trunc instructions, using the newly working support for EXTRACT_SUBREG.
Tags
Apple/llvmCore-2067
Owen Anderson
Add support for fast-isel of opcodes that require use of extract_subreg. Because of how extract_subreg is treated, it requires special case handling.
Dale Johannesen
Implement partial-word binary atomics on ppc.
Owen Anderson
FastEmitInst_extractsubreg doesn't need to be passed the register class. It can get it from MachineRegisterInfo instead.
Dan Gohman
Revert r55467; it causes regressions in UnitTests/Vector/divides, Benchmarks/sim/sim, and others on x86-64.
Rafael Avila de Espindola
Correctly resize the Parts array.
Evan Cheng
If a copy isn't coalesced, but its src is defined by trivial computation. Re-materialize the src to replace the copy.
Evan Cheng
FsFLD0S{S|D} and V_SETALLONES are as cheap as moves.
Chris Lattner
Make the verifier reject instructions which have null pointers for operands: rdar://6179606. no testcase, because I can't write a .ll file that is this broken ;-)
Chris Lattner
Clear the intervals list in "destroy", patch by Prakash Prabhu!
Dale Johannesen
Split the ATOMIC NodeType's to include the size, e.g. ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD. Increased the Hardcoded Constant OpActionsCapacity to match. Large but boring; no functional change. This is to support partial-word atomics on ppc; i8 is not a valid type there, so by the time we get to lowering, the ATOMIC_LOAD nodes looks the same whether the type was i8 or i32. The information can be added to the AtomicSDNode, but that is the largest SDNode; I don't fully understand the SDNode allocation, but it is sensitive to the largest node size, so increasing that must be bad. This is t…
Dale Johannesen
This test crashes on non-x86 host; make SSE explicit. Feel free to fix a better way!
Dan Gohman
Fix a missing #include. Patch by Andrew John Hughes.
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2 tags
Dan Gohman
Reorganize the lifetimes of the major objects SelectionDAGISel works with. SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering objects now get created once per SelectionDAGISel instance, and can be reused across blocks and across functions. Previously, they were created and destroyed each time they were needed. This reorganization simplifies the handling of PHI nodes, and also SwitchCases, JumpTables, and BitTestBlocks. This simplification has the side effect o…
Owen Anderson
Add a helper method that will be used to support EXTRACT_SUBREG for selecting trunc's in fast-isel.
Tags
2 tags
Bill Wendling
Make "movdq2q" and "movq2dq" dependent upon having SSE2 because they use the SSE2 registers as well as the MMX registers.
Bill Wendling
Put file scoped constants in an anonymous namespace. Use the "using namespace llvm" for consistency.
Evan Cheng
Move the check whether it's worth remating to caller.
Devang Patel
Do not apply the transformation if the target does not support DestTy natively.
Devang Patel
Backout 55429
Dan Gohman
Fix FastISel's bitcast code for the case where getRegForValue fails.
Evan Cheng
Refactor isSafeToReMat out of 2addr pass.
Devang Patel
Add facility to create a target.
Owen Anderson
Use TargetLowering to get the types in fast isel, which handles pointer types correctly for our purposes.
Dan Gohman
Don't check TLI.getOperationAction. The FastISel way is to just try to do the action and let the tablegen-generated code determine if there is target-support for an operation.
Dan Gohman
Add a new FastISel method, getRegForValue, which takes care of the details of materializing constants and other values into registers, and make use of it in several places.
Dan Gohman
Add a comment about the current floating-point constant code in FastISel.
Devang Patel
Fix typos and whitespaces. Other cosmetic changes based on feedback.
Chris Lattner
Minor cleanup.
Dan Gohman
Reinstate the x86-64 portion of r55190. When doing extloads into 64-bit registers from 16-bit and smaller memory locations, prefer instructions that define the entire 64-bit register, to avoid partial-register updates.
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