Commits

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Author Commit Message Labels Comments Date
bcardosolopes
Mips ISelLowering cleanup : Removed old LowerCALL and FORMAL_ARGS helpers, they aren't used anyway, they also used to broke compiling when fastcc was specified for a function, but not anymore.
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2 tags
bcardosolopes
Handle i32->f32 bitconvert results.
Andrew Lenharth
Add atomic sub for other sizes
Chris Lattner
Emit saveri with the correct operand order, patch by Richard Pennington!
bcardosolopes
Fix PR2615
bcardosolopes
Improved asm inline for hi,lo results Added hi,lo registers to be used,def implicitly. This provides better handle of instructions which use hi/lo. Fixes a small BranchAnalysis bug
bcardosolopes
Apply the same pattern used in 'and' lowering for 'or'
Duncan Sands
Fix comment typos.
Tags
checker-71
Bill Wendling
Removed unused parameters.
Dale Johannesen
Make sse2 explicit, for non-x86 hosts.
bcardosolopes
Expand fcopysign
bcardosolopes
Handle more SELECT corner cases considering legalize types, probabily wont work with the default legalizer.
Dale Johannesen
Add a flag to disable jump table generation (all switches use the binary search algorithm) for environments that don't support it. PPC64 JIT is such an environment; turn the flag on for that.
Dan Gohman
Improve dagcombining for sext-loads and sext-in-reg nodes.
bcardosolopes
Added pattern for floating point zero immediate (avoiding a constant pool access). Added pattern to match bitconvert node. Fixed MTC1 asm string bug.
Dan Gohman
Move SelectionDAG::viewGraph() out of line; as an inline function it isn't always visible to gdb.
Dan Gohman
Don't look for leaf values to store when lowering stores of empty structs. This fixes PR2612.
Owen Anderson
Use existing LiveInterval methods to simplify live interval merging. Thanks to Evan for pointing these out.
Dan Gohman
I missed this file in r54223. movzbl is now used instead of movzbw here.
Dan Gohman
Reapply r54147 with a constraint to only use the 8-bit subreg form on x86-64, to avoid the problem with x86-32 having GPRs that don't have 8-bit subregs. Also, change several 16-bit instructions to use equivalent 32-bit instructions. These have a smaller encoding and avoid partial-register updates.
Owen Anderson
Value numbers whose def index is a special sentinel value should not be remapped.
bcardosolopes
Fixed bug in global address lowering for functions and in Brcond lowering
bcardosolopes
Removed small section flag for mips, the assembler doesnt support this flag
bcardosolopes
Added new features to represent specific instructions groups
bcardosolopes
Instruction definition cleanup
matthijs
Document BasicBlock::Create.
matthijs
Not that using stream headers other than iostream is allowed.
Mon P Wang
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32
Tags
checker/checker-71
Eli Friedman
Another SCEV issue from PR2607; essentially the same issue, but this time applying to the implicit comparison in smin expressions. The correct way to transform an inequality into the opposite inequality, either signed or unsigned, is with a not expression. I looked through the SCEV code, and I don't think there are any more occurrences of this issue.
Owen Anderson
More fixes for corner cases when remapping live range indices.
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