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Gabor Greif
Simplify this class by removing the result cache. This change removes the DefaultConstructible and CopyAssignable constraints on the template parameter T (the first one). The second template parameter (R) is defaulted to be identical to the first and controls the result type. By specifying it to be (const T&) additionally the CopyConstructible constraint on T can be removed. This allows to use StringSwitch e.g. for llvm::Constant instances. Re…
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cremebrulee-26
Bill Wendling
Revert part of r91101 which was causing an infinite loop in the self-hosting build bots.
Duncan Sands
Add utility method for determining whether a function argument has the 'nest' attribute.
Evan Cheng
Tests for 91103 and 91104.
Evan Cheng
Add support to 3-addressify 16-bit instructions.
Evan Cheng
Coalesce insert_subreg undef, x first to avoid phase ordering issue.
Bill Wendling
Address comments on last patch: - Loosen the restrictions when checking of it branches to a landing pad. - Make the loop more efficient by checking the '.insert' return value. - Do cheaper checks first.
Bill Wendling
A machine basic block may end in an unconditional branch, however it may have more than one successor. Normally, these extra successors are dead. However, some of them may branch to exception handling landing pads. If we remove those successors, then the landing pads could go away if all predecessors to it are removed. Before, it was checking if the direct successor was the landing pad. But it could be the result of jumping through multiple basic blocks to get to it. If we …
Jim Grosbach
Rough first pass at compare_and_swap atomic builtins for ARM mode. Work in progress.
Anders Carlsson
Add qualifiers for calls to member functions in dependent bases.
Devang Patel
If VariableDIe is not created (may be because global was optimzed away) then do not try to use the variable die.
Eric Christopher
Add a test for the fix in revision 91009.
Evan Cheng
It's not safe to coalesce a move where src and dst registers have different subregister indices. e.g.: %reg16404:1<def> = MOV8rr %reg16412:2<kill>
Douglas Gregor
Remove a broken, unused header
Devang Patel
Refactor code that finds context for a given die. Create global variable DIEs after creating subprogram DIEs. This allows function level static variable's to find their context at the time of DIE creation.
Jim Grosbach
Add instruction encoding for DMB/DSB
Devang Patel
Refactor.
Jakob Stoklund Olesen
Also attempt trivial coalescing for live intervals that end in a copy. The coalescer is supposed to clean these up, but when setting up parameters for a function call, there may be copies to physregs. If the defining instruction has been LICM'ed far away, the coalescer won't touch it. The register allocation hint does not always work - when the register allocator is backtracking, it clears the hints. This patch is more conservative than r90502, and does not break 4…
Edwin Torok
Comparing std::string with NULL is a bad idea, so just check whether its empty. This code was crashing always with oprofile enabled, since it tried to create a StringRef out of NULL, which run strlen on NULL.
Eric Christopher
Make sure the immediate dominator isn't NULL through iterations of the loop. We could get to this condition via indirect branches.
Chris Lattner
Fix PR5744, a case where we were getting the pointer size instead of the value size. This only manifested when memdep inprecisely returns clobber, which is do to a caching issue in the PR5744 testcase. We can 'efficiently emulate' this by using '-no-aa'
Jim Grosbach
Add memory barrier intrinsic support for ARM. Moving towards adding the atomic operations intrinsics.
Chris Lattner
allow this to build when the #if 0's are enabled. No functionality change.
Dan Gohman
Dereference loopHeader after checking for null rather than before.
Evan Cheng
Fix test.
Evan Cheng
Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g. vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0> => vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1> iff ptr is 16-byte aligned (or can be made into 16-byte aligned).
Dan Gohman
Reuse the Threshold value to size these containers because it's currently somewhat convenient for them to have the same value.
Devang Patel
Reapply r90858, a cleanup patch.
Chris Lattner
fix hte last remaining known (by me) phi translation bug. When we reanalyze clobbers to forward pieces of large stores to small loads, we need to consider the properly phi translated pointer in the store block.
Chris Lattner
change GetStoreValueForLoad to use IRBuilder, which is cleaner and implicitly constant folds.
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