1. Dan Villiom Podlaski Christiansen
  2. LLVM

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svn-r61853
Chris Lattner
Implement the first half of PR3290: if there is a store of an integer to a (transitive) bitcast the alloca and if that integer has the full size of the alloca, then it clobbers the whole thing. Handle this by extracting pieces out of the stored integer and filing them away in the SROA'd elements. This triggers fairly frequently because the CFE uses integers to pass small structs by value and the inliner exposes these. For example, in kimwitu++, I see a bunch of these with i64 stores to "%struct.std::pair<std::_Rb_tree_const_iterator<kc::impl_abstract_phylum*>,bool>" In 176.gcc I see a few i32 stores to "%struct..0anon". In the testcase, this is a difference between compiling test1 to: …
Chris Lattner
Factor a bunch of code out into a helper method.
Chris Lattner
use continue to simplify code and reduce nesting, no functionality change.
Chris Lattner
Get TargetData once up front and cache as an ivar instead of requerying it all over the place.
Chris Lattner
Use the hasAllZeroIndices predicate to simplify some code, no functionality change.
Evan Cheng
The coalescer does not coalesce a virtual register to a physical register if any of the physical register's sub-register live intervals overlaps with the virtual register. This is overly conservative. It prevents a extract_subreg from being coalesced away: v1024 = EDI // not killed = = EDI One possible solution is for the coalescer to examine the sub-register live intervals in the same manner as the physical register. Another possibility is to examine defs and uses (when needed) of sub-registers. Both solutions are too expensive. For now, look for "short virtual intervals" and scan instructions to look for conflict instead. This is a …
Chris Lattner
add a testcase.
Dan Gohman
Add patterns to match conditional moves with loads folded into their left operand, rather than their right. Do this by commuting the operands and inverting the condition.
Dan Gohman
Add load-folding table entries for cmovno too.
Dan Gohman
Define instructions for cmovo and cmovno.
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Dan Gohman
X86_COND_C and X86_COND_NC are alternate mnemonics for X86_COND_B and X86_COND_AE, respectively.
Bob Wilson
Improve support for type-generic vector intrinsics by teaching TableGen how to handle LLVMMatchType intrinsic parameters, and by adding new subclasses of LLVMMatchType to match vector types with integral elements that are either twice as wide or half as wide as the elements of the matched type.
Dan Gohman
Now that fold-pcmpeqd-0.ll is effectively testing that scheduling helps avoid the need for spilling, add a new testcase that tests that the pcmpeqd used for V_SETALLONES is changed to a constant-pool load as needed.
Dan Gohman
Revert r42653 and forward-port the code that lets INC64_32r be converted to LEA64_32r in x86's convertToThreeAddress. This replaces code like this: movl %esi, %edi inc %edi with this: lea 1(%rsi), %edi which appears to be beneficial.
Scott Michel
CellSPU: - Add preliminary support for v2i32; load/store generates the right code but there's a lot work to be done to make this vector type operational.
Dan Gohman
Fix a bug in ComputeLinearIndex computation handling multi-level aggregate types. Don't increment the current index after reaching the end of a struct, as it will already be pointing at one-past-the end. This fixes PR3288.
Devang Patel
Set up DwarfDebug using DebugInfo API.
Bill Wendling
Forgot that this was needed for Linux. This should fix the builds.
Owen Anderson
The phi construction algorithm used for interval reconstruction is complicated by two address instructions. We need to keep track of things we've processed AS USES independetly of whether we've processed them as defs. This fixes all known miscompilations when reconstruction is turned on.
Scott Michel
CellSPU: Update the README
Scott Michel
CellSPU: - Fix bugs 3194, 3195: i128 load/stores produce correct code (although, we need to ensure that i128 is 16-byte aligned in real life), and 128 zero- extends are supported. - New td file: SPU128InstrInfo.td: this is where all new i128 support should be put in the future. - Continue to hammer on i64 operations and test cases; ensure that the only remaining problem will be i64 mul.
Dan Gohman
Delete this test; it's a duplicate of 2006-07-03-schedulers.ll.
Dan Gohman
Update these argument lists for the isNormalMemory argument. This doesn't affect current functionality.
Dan Gohman
Use a latency value of 0 for the artificial edges inserted by AddPseudoTwoAddrDeps. This lets the scheduling infrastructure avoid recalculating node heights. In very large testcases this was a major bottleneck. Thanks to Roman Levenstein for finding this! As a side effect, fold-pcmpeqd-0.ll is now scheduled better and it no longer requires spilling on x86-32.
Chris Lattner
no need to negate the APInt for 0.
Chris Lattner
Change m_ConstantInt and m_SelectCst to take their constant integers as template arguments instead of as instance variables, exposing more optimization opportunities to the compiler earlier.
Chris Lattner
make m_ConstantInt(int64_t) safely match ConstantInt's that are larger than i64. This fixes an instcombine crash on PR3235.
Devang Patel
Construct subprogram DIEs using DebugInfo.
Devang Patel
Construct global variable DIEs using DebugInfo.
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