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David Schneider committed b797d85

refactor a bit the generation of functions that emit code for cmp operations

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  • Parent commits 518a528
  • Branches arm-backend-2

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Files changed (3)

File pypy/jit/backend/arm/helper/assembler.py

 from pypy.rlib.rarithmetic import r_uint, r_longlong, intmask
 from pypy.jit.metainterp.resoperation import rop
 
-def gen_emit_op_unary_cmp(name, true_cond, false_cond):
+def gen_emit_op_unary_cmp(name, true_cond):
+    false_cond = c.get_opposite_of(true_cond)
     def f(self, op, arglocs, regalloc, fcond):
         assert fcond is not None
         reg, res = arglocs
     f.__name__ = 'emit_op_%s' % name
     return f
 
-def gen_emit_guard_unary_cmp(name, true_cond, false_cond):
+def gen_emit_guard_unary_cmp(name, true_cond):
+    false_cond = c.get_opposite_of(true_cond)
     def f(self, op, guard, arglocs, regalloc, fcond):
         assert fcond is not None
         assert guard is not None
         guard_opnum = guard.getopnum()
         if guard_opnum == rop.GUARD_FALSE:
             cond = false_cond
-        self._emit_guard(guard, arglocs[1:], cond)
-        return fcond
+        return self._emit_guard(guard, arglocs[1:], cond)
     f.__name__ = 'emit_guard_%s' % name
     return f
 
     return f
 
 def gen_emit_cmp_op(name, condition):
+    inv = c.get_opposite_of(condition)
     def f(self, op, arglocs, regalloc, fcond):
         l0, l1, res = arglocs
 
-        inv = c.get_opposite_of(condition)
         if l1.is_imm():
             self.mc.CMP_ri(l0.value, imm=l1.getint(), cond=fcond)
         else:
     f.__name__ = 'emit_op_%s' % name
     return f
 
-def gen_emit_cmp_op_guard(name, condition):
+def gen_emit_cmp_op_guard(name, true_cond):
+    false_cond = c.get_opposite_of(true_cond)
     def f(self, op, guard, arglocs, regalloc, fcond):
+        assert guard is not None
         l0 = arglocs[0]
         l1 = arglocs[1]
+        assert l0.is_reg()
 
-        inv = c.get_opposite_of(condition)
         if l1.is_imm():
             self.mc.CMP_ri(l0.value, imm=l1.getint(), cond=fcond)
         else:
             self.mc.CMP_rr(l0.value, l1.value, cond=fcond)
         guard_opnum = guard.getopnum()
-        cond = condition
+        cond = true_cond
         if guard_opnum == rop.GUARD_FALSE:
-            cond = inv
-        self._emit_guard(guard, arglocs[2:], cond)
-        return fcond
+            cond = false_cond
+        return self._emit_guard(guard, arglocs[2:], cond)
     f.__name__ = 'emit_guard_%s' % name
     return f
 
     return f
 
 def gen_emit_float_cmp_op(name, cond):
+    inv = c.get_opposite_of(cond)
     def f(self, op, arglocs, regalloc, fcond):
         arg1, arg2, res = arglocs
-        inv = c.get_opposite_of(cond)
         self.mc.VCMP(arg1.value, arg2.value)
         self.mc.VMRS(cond=fcond)
         self.mc.MOV_ri(res.value, 1, cond=cond)
     f.__name__ = 'emit_op_%s' % name
     return f
 
-def gen_emit_float_cmp_op_guard(name, guard_cond):
+def gen_emit_float_cmp_op_guard(name, true_cond):
+    false_cond = c.get_opposite_of(true_cond)
     def f(self, op, guard, arglocs, regalloc, fcond):
+        assert guard is not None
         arg1 = arglocs[0]
         arg2 = arglocs[1]
-        inv = c.get_opposite_of(guard_cond)
         self.mc.VCMP(arg1.value, arg2.value)
         self.mc.VMRS(cond=fcond)
-        cond = guard_cond
+        cond = true_cond
         guard_opnum = guard.getopnum()
         if guard_opnum == rop.GUARD_FALSE:
-            cond = inv
-        self._emit_guard(guard, arglocs[2:], cond)
-        return fcond
+            cond = false_cond
+        return self._emit_guard(guard, arglocs[2:], cond)
     f.__name__ = 'emit_guard_%s' % name
     return f
 

File pypy/jit/backend/arm/helper/regalloc.py

     def f(self, op, guard_op, fcond):
         assert fcond is not None
         boxes = list(op.getarglist())
-        if not inverse:
-            arg0, arg1 = boxes
-        else:
-            arg1, arg0 = boxes
-        # XXX consider swapping argumentes if arg0 is const
-        imm_a0 = _check_imm_arg(arg0)
+        arg0, arg1 = boxes
         imm_a1 = _check_imm_arg(arg1)
 
         l0, box = self._ensure_value_is_boxed(arg0, forbidden_vars=boxes)
         boxes.append(box)
-        if imm_a1 and not imm_a0:
+        if imm_a1:
             l1 = self.make_sure_var_in_reg(arg1, boxes)
         else:
             l1, box = self._ensure_value_is_boxed(arg1, forbidden_vars=boxes)

File pypy/jit/backend/arm/opassembler.py

     emit_op_int_ge = gen_emit_cmp_op('int_ge', c.GE)
 
 
-    emit_op_ptr_eq = emit_op_int_eq
-    emit_op_ptr_ne = emit_op_int_ne
 
     emit_guard_int_lt = gen_emit_cmp_op_guard('int_lt', c.LT)
     emit_guard_int_le = gen_emit_cmp_op_guard('int_le', c.LE)
     emit_op_uint_gt = gen_emit_cmp_op('uint_gt', c.HI)
     emit_op_uint_lt = gen_emit_cmp_op('uint_lt', c.LO)
     emit_op_uint_ge = gen_emit_cmp_op('uint_ge', c.HS)
+
+    emit_guard_uint_le = gen_emit_cmp_op_guard('uint_le', c.LS)
+    emit_guard_uint_gt = gen_emit_cmp_op_guard('uint_gt', c.HI)
     emit_guard_uint_lt = gen_emit_cmp_op_guard('uint_lt', c.LO)
     emit_guard_uint_ge = gen_emit_cmp_op_guard('uint_ge', c.HS)
 
-    emit_guard_uint_le = gen_emit_cmp_op_guard('uint_le', c.LS)
-    emit_guard_uint_gt = gen_emit_cmp_op_guard('uint_gt', c.HI)
-
-    emit_guard_uint_lt = gen_emit_cmp_op_guard('uint_lt', c.HI)
-    emit_guard_uint_ge = gen_emit_cmp_op_guard('uint_ge', c.LS)
-
+    emit_op_ptr_eq = emit_op_int_eq
+    emit_op_ptr_ne = emit_op_int_ne
     emit_guard_ptr_eq = emit_guard_int_eq
     emit_guard_ptr_ne = emit_guard_int_ne
 
 
     _mixin_ = True
 
-    emit_op_int_is_true = gen_emit_op_unary_cmp('int_is_true', c.NE, c.EQ)
-    emit_op_int_is_zero = gen_emit_op_unary_cmp('int_is_zero', c.EQ, c.NE)
+    emit_op_int_is_true = gen_emit_op_unary_cmp('int_is_true', c.NE)
+    emit_op_int_is_zero = gen_emit_op_unary_cmp('int_is_zero', c.EQ)
 
-    emit_guard_int_is_true = gen_emit_guard_unary_cmp('int_is_true', c.NE, c.EQ)
-    emit_guard_int_is_zero = gen_emit_guard_unary_cmp('int_is_zero', c.EQ, c.NE)
+    emit_guard_int_is_true = gen_emit_guard_unary_cmp('int_is_true', c.NE)
+    emit_guard_int_is_zero = gen_emit_guard_unary_cmp('int_is_zero', c.EQ)
 
     def emit_op_int_invert(self, op, arglocs, regalloc, fcond):
         reg, res = arglocs
 
     _mixin_ = True
 
-    guard_size = 5*WORD
     def _emit_guard(self, op, arglocs, fcond, save_exc=False, is_guard_not_ivalidated=False):
         descr = op.getdescr()
         assert isinstance(descr, AbstractFailDescr)