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Anonymous committed 81875ad

Minor tweaks.

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  • Parent commits 871adc1

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File include/gpif.h

  * code but ported to sdcc.
  *
  * uses syncdelay of 4 which might not be long enough if peripheral
- * runs slower than 30mhz
+ * runs slower than 30mhz.  May not affect anything.
  *
  * IFCONFIG is set with IFCFG[1:0] = 10 for GPIF master but you still
  * have to set the ifclk, polarity, and the rest of the bits
   // ASYNC=1      , master samples asynchronous
   // GSTATE=1     , Drive GPIF states out on PORTE[2:0], debug WF
   // IFCFG[1:0]=10, FX2 in GPIF master mode  IFCONFIG
-  IFCONFIG &= ~0xfc; // turn off IFCFG[1:0]
+  IFCONFIG &= ~0x03; // turn off IFCFG[1:0]
   IFCONFIG |= 0x02; // set's IFCFG[1:0] to 10 to put in GPIF master mode.