1. Konrad Delong
  2. pypy

Commits

David Schneider  committed a10cd0f

Add support for imm values in float load and store instructions

  • Participants
  • Parent commits 50e839c
  • Branches arm-backend-2

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Files changed (2)

File pypy/jit/backend/arm/instruction_builder.py

View file
         | 0x5 << 0x9
         | 0x1 << 0x8)
 
+    # The imm value for thins function has to be a multiple of 4,
+    # the value actually encoded is imm / 4
     def f(self, dd, rn, imm=0, cond=cond.AL):
+        assert imm % 4 == 0
+        imm = imm/4
         u, imm = self._encode_imm(imm)
         instr = ( n
                 | (cond & 0xF) << 28

File pypy/jit/backend/arm/test/test_instr_codebuilder.py

View file
         self.cb.VSUB(r.d1.value, r.d2.value, r.d3.value, conditions.GT)
         self.assert_equal("VSUBGT.F64 D1, D2, D3")
 
+    def test_vstr_offset(self):
+        assert py.test.raises(AssertionError, 'self.cb.VSTR(r.d1, r.r4, 3)')
+
     def test_pop_raises_on_lr(self):
         assert py.test.raises(AssertionError, 'self.cb.POP([r.lr.value])')
 
     tests = []
     for c,v in [('EQ', conditions.EQ), ('LE', conditions.LE), ('AL', conditions.AL)]:
         for reg in range(16):
-            if reg == 14:
-                tests.append(lambda self: py.test.skip('r14(lr) gives strange results'))
-                continue
-
-            for creg in range(16):
+            for creg in range(2):
                 asm = 'd%d, [r%d]' % (creg, reg)
                 tests.append((asm, (creg, reg)))
-                #asm = 'd%d, [r%d, #4]' % (creg, reg)
-                #tests.append((asm, (creg, reg, 4)))
+                asm = 'd%d, [r%d, #16]' % (creg, reg)
+                tests.append((asm, (creg, reg, 16)))
     return tests
 
 def gen_test_float64_data_proc_instructions_func(name, table):