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Kevin Veroneau committed fc0e51a

Added new software interrupt of 8, to allow easy string comparing.

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  • Parent commits 566aa21

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Files changed (4)

         'mov': 2,
         'add': 12,
         'sub': 13,
+        'cmp': 17,
         'mul': 18,
         'div': 19,
     }
             elif op == 16:
                 if self.cx.b != self.mem.read16().b:
                     self.mem.ptr = self.dx.b+self.cs.b
+            elif op == 17:
+                xop,dst,src = self.get_xop()
+                if xop in [1,3,9,11]:
+                    # Register is destination
+                    dst = getattr(self, self.var_map[dst])
+                elif xop in [5,7]:
+                    dst = getattr(self, self.var_map[dst]).b
+                if xop in [9,11]:
+                    # Compares memory address and register.
+                    result = src - dst.value
+                elif xop in [4,5,6,7]:
+                    # Compares data and memory address.
+                    result = src - self.mem[self.ds.b+dst]
+                else:
+                    # Compares data and register.
+                    result = src - dst.value
+                self.cx.value = result
             elif op == 18:
                 xop,dst,src = self.get_xop()
                 if xop not in [1,3,6,9,11]:

File interrupt.bin

Binary file modified.

File interrupt.tbl

Binary file modified.

File sample-interrupts.txt

   AX: source
   BX: destination
   CX: block size
+INT 8:
+  String compare routine.
+  AX: memory address of string 1
+  BX: memory address of string 2
+  Returns CX: Returns 0 if string matches, otherwise returns difference.
 INT 10:
   Reads a 0-terminated string of bytes from CPU memory and display it on the screen.
   AX: source