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David Schneider committed a801192

more register clobbering issues in _store_and_reset_exception

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  • Parent commits 322b923

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File rpython/jit/backend/arm/assembler.py

         assert excvalloc is not r.ip
         assert exctploc is not r.ip
         tmpreg = r.lr
+        mc.gen_load_int(r.ip.value, self.cpu.pos_exc_value())
         if excvalloc is not None: # store
             assert excvalloc.is_reg()
-            mc.gen_load_int(r.ip.value, self.cpu.pos_exc_value())
             self.load_reg(mc, excvalloc, r.ip)
         if on_frame:
             # store exc_value in JITFRAME
             ofs = self.cpu.get_ofs_of_frame_field('jf_guard_exc')
             assert check_imm_arg(ofs)
+            #
             self.load_reg(mc, r.ip, r.ip, helper=tmpreg)
+            #
             self.store_reg(mc, r.ip, r.fp, ofs, helper=tmpreg)
-            mc.gen_load_int(r.ip.value, self.cpu.pos_exc_value())
         if exctploc is not None:
             # store pos_exception in exctploc
             assert exctploc.is_reg()
-            mc.gen_load_int(tmpreg.value, self.cpu.pos_exception())
-            self.load_reg(mc, exctploc, tmpreg)
+            mc.gen_load_int(r.ip.value, self.cpu.pos_exception())
+            self.load_reg(mc, exctploc, r.ip, helper=tmpreg)
+
+        if on_frame or exctploc is not None:
             mc.gen_load_int(r.ip.value, self.cpu.pos_exc_value())
 
         # reset exception