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Author Commit Message Labels Comments Date
Armin Rigo
Issue #2039
Richard Plangger
test commit, have i resolved all my hg problems?
Branches
vecopt
Maciej Fijalkowski
merge
Maciej Fijalkowski
a slightly different fix that actually fixes the problem
Armin Rigo
Issue 1194: test and fix
Maciej Fijalkowski
port the cpython test and improve situation a little bit
Maciej Fijalkowski
consider COND_CALL_VALUE in heapcache
Branches
conditional_call_value
Richard Plangger
activated vectorize for 2 jit drivers (micronumpy)
Branches
vecopt
Richard Plangger
renamed branch to vecopt
Branches
vecopt
Richard Plangger
assert isinstance of none prevented (for tests)
Branches
vecopt2
Richard Plangger
merged default
Branches
vecopt2
Richard Plangger
removed vectorized parameter of jit driver (micronumpy)
Branches
vecopt2
Richard Plangger
turned off vectorization by default
Branches
vecopt2
Richard Plangger
removed check trace count == 1, added missed changes in merge
Branches
vecopt2
Richard Plangger
updated vector to small test (simpler) and added new test for constant expansion
Branches
vecopt2
Richard Plangger
bridge can now be assembled (previously an early exit skipped to the blackhole interpreter)
Branches
vecopt2
Richard Plangger
changes to make rpython happy
Branches
vecopt2
Richard Plangger
guard_early_exit are not passed to the backend. vectorize tests all pass again
Branches
vecopt2
Richard Plangger
weaker guards are stripped from the trace
Branches
vecopt2
Richard Plangger
added a new test to collapse guards, I plan to restructure this and make it on the level of a dependency graph
Branches
vecopt2
Richard Plangger
vectorization now uses the preamble of the unrolling optimization, this is a step towards a unified unrolling algorithm (and keeps most of the variables in the register)
Branches
vecopt2
Richard Plangger
started to implement guard folding. (j=i+1,guard(j),k=j+1,guard(k) => j=i+2, guard(j))
Branches
vecopt2
Richard Plangger
changes to make the rtyper work correctly, SIMD loads now only from is now aligned (not correct, just for testing)
Branches
vecopt2
Richard Plangger
wrapping all parameters passed to the assembler (from regalloc) in imm
Branches
vecopt2
Richard Plangger
added vec_int_signext to the backend (is ignored and register is forced)
Branches
vecopt2
Richard Plangger
x86_64 backend is now capable of emitting sse2 instructions for the current vector operations
Branches
vecopt2
Richard Plangger
renamed guard_no_early_exit to guard_early_exit
Branches
vecopt2
Richard Plangger
renamed VectorizeTest class to plural
Branches
vecopt2
Richard Plangger
removed print statements for a translated binary (tests still print some verbose informations)
Branches
vecopt2
Richard Plangger
introduced vec_getarrayitem_raw which was previously handled by vector raw load (was not correct)
Branches
vecopt2
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