(We've discussed this before. This is a clearer explanation of the issue.)
This is an array of thermal vias under the exposed pad of a QFN. They are 0.35mm drills, with width/height of 0.7mm. For one of them, I have checked the “stop” flag.
This causes an opening on the bottom for the entire 0.7mm diameter. In my experience, this is not standard: I want a hole in the solder mask so air can escape during reflow, but I don't want more than a negligible amount of exposed copper to avoid the risk of shorts, corrosion and other accidents.
Why don't I simply set width/height to 0.35mm? Because then DRC complains.
I see two solutions:
1) DRC option to ignore “annular ring” (or consider it simply an additional distance) for vias entirely enclosed by the same net (whether a pad or a polygon), or consider it an additional required spacing.
2) Have solder mask apertures for vias only apply to the drill. (I think this should be the default anyway.)