Commits

Sar Castillo committed f48b4f6

Revert "cpufreq: semi-dynamic freq steps. semi, because the steps are fixed for now."

This reverts commit 712bccc819554b08071cc36ab091a307d039fc98.

Comments (0)

Files changed (4)

arch/arm/mach-exynos/cpufreq-4210.c

 
 #include <plat/clock.h>
 
-#define CPUFREQ_LEVEL_END	L18
+#define CPUFREQ_LEVEL_END	L6
 
 static int max_support_idx;
 static int min_support_idx = (CPUFREQ_LEVEL_END - 1);
 static unsigned int exynos4210_volt_table[CPUFREQ_LEVEL_END];
 
 static struct cpufreq_frequency_table exynos4210_freq_table[] = {
-	{L0, 1600*1000},
-	{L1, 1500*1000},
-	{L2, 1400*1000},
-	{L3, 1300*1000},
-	{L4, 1200*1000},
-	{L5, 1100*1000},
-	{L6, 1000*1000},
-	{L7,  900*1000},
-	{L8,  800*1000},
-	{L9,  700*1000},
-	{L10, 600*1000},
-	{L11, 500*1000},
-	{L12, 400*1000},
-	{L13, 300*1000},
-	{L14, 200*1000},
-	{L15, 100*1000},
-	{L16,  50*1000},
-	{L17,  25*1000},
+	{L0, 1400*1000},
+	{L1, 1200*1000},
+	{L2, 1000*1000},
+	{L3, 800*1000},
+	{L4, 500*1000},
+	{L5, 200*1000},
 	{0, CPUFREQ_TABLE_END},
 };
 
 static struct cpufreq_clkdiv exynos4210_clkdiv_table[] = {
-	{L0,  0},
-	{L1,  0},
-	{L2,  0},
-	{L3,  0},
-	{L4,  0},
-	{L5,  0},
-	{L6,  0},
-	{L7,  0},
-	{L8,  0},
-	{L9,  0},
-	{L10, 0},
-	{L11, 0},
-	{L12, 0},
-	{L13, 0},
-	{L14, 0},
-	{L15, 0},
-	{L16, 0},
-	{L17, 0},
+	{L0, 0},
+	{L1, 0},
+	{L2, 0},
+	{L3, 0},
+	{L4, 0},
+	{L5, 0},
 };
 
 static unsigned int clkdiv_cpu0[CPUFREQ_LEVEL_END][7] = {
 	 * { DIVCORE, DIVCOREM0, DIVCOREM1, DIVPERIPH,
 	 *		DIVATB, DIVPCLK_DBG, DIVAPLL }
 	 */
-	/* ARM L0: 1600MHz */
+	/* ARM L0: 1400MHz */
 	{ 0, 3, 7, 3, 4, 1, 7 },
 
-	/* ARM L1: 1500MHz */
+	/* ARM L1: 1200MHz */
 	{ 0, 3, 7, 3, 4, 1, 7 },
 
-	/* ARM L2: 1400MHz */
+	/* ARM L2: 1000MHz */
 	{ 0, 3, 7, 3, 4, 1, 7 },
 
-	/* ARM L3: 1300MHz */
-	{ 0, 3, 7, 3, 4, 1, 7 },
-
-	/* ARM L4: 1200MHz */
-	{ 0, 3, 7, 3, 4, 1, 7 },
-
-	/* ARM L5: 1100MHz */
-	{ 0, 3, 7, 3, 4, 1, 7 },
-
-	/* ARM L6: 1000MHz */
-	{ 0, 3, 7, 3, 4, 1, 7 },
-
-	/* ARM L7: 900MHz */
-	{ 0, 3, 7, 3, 4, 1, 7 },
-
-	/* ARM L8: 800MHz */
-	{ 0, 3, 7, 3, 3, 1, 7 },
-
-	/* ARM L9: 700MHz */
-	{ 0, 3, 7, 3, 3, 1, 7 },
-
-	/* ARM L10: 600MHz */
-	{ 0, 3, 7, 3, 3, 1, 7 },
-
-	/* ARM L11: 500MHz */
-	{ 0, 3, 7, 3, 3, 1, 7 },
-
-	/* ARM L12: 400MHz */
+	/* ARM L3: 800MHz */
 	{ 0, 3, 7, 3, 3, 1, 7 },
 
-	/* ARM L13: 300MHz */
+	/* ARM L4: 500MHz */
 	{ 0, 3, 7, 3, 3, 1, 7 },
 
-	/* ARM L14: 200MHz */
-	{ 0, 1, 3, 1, 3, 1, 0 },
-
-	/* ARM L15: 100MHz */
-	{ 0, 1, 3, 1, 3, 1, 0 },
-
-	/* ARM L16: 50MHz */
-	{ 0, 1, 3, 1, 3, 1, 0 },
-
-	/* ARM L17: 25MHz */
+	/* ARM L5: 200MHz */
 	{ 0, 1, 3, 1, 3, 1, 0 },
 };
 
 	/* Clock divider value for following
 	 * { DIVCOPY, DIVHPM }
 	 */
-	/* ARM L0: 1600MHz */
-	{ 5, 0 },
-
-	/* ARM L1: 1500MHz */
-	{ 5, 0 },
-
-	/* ARM L2: 1400MHz */
-	{ 5, 0 },
-
-	/* ARM L3: 1300MHz */
+	/* ARM L0: 1400MHz */
 	{ 5, 0 },
 
-	/* ARM L4: 1200MHz */
+	/* ARM L1: 1200MHz */
 	{ 5, 0 },
 
-	/* ARM L5: 1100MHz */
-	{ 5, 0 },
-
-	/* ARM L6: 1000MHz */
-	{ 4, 0 },
-
-	/* ARM L7: 900MHz */
+	/* ARM L2: 1000MHz */
 	{ 4, 0 },
 
-	/* ARM L8: 800MHz */
-	{ 3, 0 },
-
-	/* ARM L9: 700MHz */
-	{ 3, 0 },
-
-	/* ARM L10: 600MHz */
-	{ 3, 0 },
-
-	/* ARM L11: 500MHz */
-	{ 3, 0 },
-
-	/* ARM L12: 400MHz */
-	{ 3, 0 },
-
-	/* ARM L13: 300MHz */
-	{ 3, 0 },
-
-	/* ARM L14: 200MHz */
-	{ 3, 0 },
-
-	/* ARM L15: 100MHz */
+	/* ARM L3: 800MHz */
 	{ 3, 0 },
 
-	/* ARM L16: 50MHz */
+	/* ARM L4: 500MHz */
 	{ 3, 0 },
 
-	/* ARM L17: 25MHz */
+	/* ARM L5: 200MHz */
 	{ 3, 0 },
 };
 
 static unsigned int exynos4_apll_pms_table[CPUFREQ_LEVEL_END] = {
-	/* APLL FOUT L0: 1600MHz */
-	((200<<16)|(3<<8)|(0x1)),
-
-	/* APLL FOUT L1: 1500MHz */
-	((375<<16)|(6<<8)|(0x1)),
-
-	/* APLL FOUT L2: 1400MHz */
+	/* APLL FOUT L0: 1400MHz */
 	((350<<16)|(6<<8)|(0x1)),
 
-	/* APLL FOUT L3: 1300MHz */
-	((325<<16)|(6<<8)|(0x1)),
-
-	/* APLL FOUT L4: 1200MHz */
+	/* APLL FOUT L1: 1200MHz */
 	((150<<16)|(3<<8)|(0x1)),
 
-	/* APLL FOUT L5: 1100MHz */
-	((275<<16)|(6<<8)|(0x1)),
-
-	/* APLL FOUT L6: 1000MHz */
+	/* APLL FOUT L2: 1000MHz */
 	((250<<16)|(6<<8)|(0x1)),
 
-	/* APLL FOUT L7: 900MHz */
-	((225<<16)|(6<<8)|(0x1)),
-
-	/* APLL FOUT L8: 800MHz */
+	/* APLL FOUT L3: 800MHz */
 	((200<<16)|(6<<8)|(0x1)),
 
-	/* APLL FOUT L9: 700MHz */
-	((350<<16)|(6<<8)|(0x2)),
-
-	/* APLL FOUT L10: 600MHz */
-	((300<<16)|(6<<8)|(0x2)),
-
-	/* APLL FOUT L11: 500MHz */
+	/* APLL FOUT L4: 500MHz */
 	((250<<16)|(6<<8)|(0x2)),
 
-	/* APLL FOUT L12: 400MHz */
-	((200<<16)|(6<<8)|(0x2)),
-
-	/* APLL FOUT L13: 300MHz */
-	((300<<16)|(6<<8)|(0x3)),
-
-	/* APLL FOUT L14: 200MHz */
+	/* APLL FOUT L5: 200MHz */
 	((200<<16)|(6<<8)|(0x3)),
-
-	/* APLL FOUT L15: 100MHz */
-	((100<<16)|(6<<8)|(0x3)),
-
-	/* APLL FOUT L16: 50MHz */
-	((50<<16)|(6<<8)|(0x3)),
-
-	/* APLL FOUT L17: 25MHz */
-	((25<<16)|(6<<8)|(0x3)),
 };
 
 /*
 	 * @500  :
 	 * @200  :
 	 */
-	{ 1450000, 1450000, 1425000, 1400000, 1400000, 1350000, 1350000, 1350000 }, //1600MHz
-	{ 1425000, 1425000, 1400000, 1375000, 1375000, 1325000, 1325000, 1325000 }, //1500MHz
-	{ 1400000, 1400000, 1350000, 1325000, 1300000, 1275000, 1250000, 1225000 }, //1400MHz
-	{ 1375000, 1375000, 1325000, 1300000, 1275000, 1250000, 1225000, 1200000 }, //1300MHz
-	{ 1350000, 1350000, 1300000, 1275000, 1250000, 1225000, 1200000, 1175000 }, //1200MHz
-	{ 1325000, 1325000, 1250000, 1225000, 1200000, 1175000, 1150000, 1125000 }, //1100MHz
-	{ 1300000, 1250000, 1200000, 1175000, 1150000, 1125000, 1100000, 1075000 }, //1000MHz
-	{ 1250000, 1200000, 1150000, 1125000, 1100000, 1075000, 1050000, 1025000 }, // 900MHz
-	{ 1200000, 1150000, 1100000, 1075000, 1050000, 1025000, 1000000,  975000 }, // 800MHz
-	{ 1150000, 1100000, 1075000, 1025000, 1025000, 1000000,  975000,  950000 }, // 700MHz
-	{ 1125000, 1075000, 1025000, 1000000, 1000000,  975000,  950000,  950000 }, // 600MHz
-	{ 1100000, 1050000, 1000000,  975000,  975000,  950000,  925000,  925000 }, // 500MHz
-	{ 1075000, 1025000, 1000000,  975000,  975000,  950000,  925000,  925000 }, // 400MHz
-	{ 1075000, 1025000, 1000000,  975000,  975000,  950000,  925000,  925000 }, // 300MHz
-	{ 1050000, 1000000,  975000,  950000,  950000,  925000,  925000,  925000 }, // 200MHz
-	{ 1025000,  975000,  950000,  925000,  925000,  900000,  900000,  900000 }, // 100MHz
-	{ 1000000,  950000,  925000,  900000,  900000,  875000,  875000,  875000 }, //  50MHz
-	{  975000,  925000,  900000,  875000,  875000,  850000,  850000,  850000 }, //  25MHz
+	{ 1400000, 1400000, 1375000, 1350000, 1350000, 1300000, 1300000, 1300000 },
+	{ 1350000, 1350000, 1300000, 1275000, 1250000, 1225000, 1200000, 1175000 },
+	{ 1300000, 1250000, 1200000, 1175000, 1150000, 1125000, 1100000, 1075000 },
+	{ 1200000, 1150000, 1100000, 1075000, 1050000, 1025000, 1000000,  975000 },
+	{ 1100000, 1050000, 1000000,  975000,  975000,  950000,  925000,  925000 },
+	{ 1050000, 1000000,  975000,  950000,  950000,  925000,  925000,  925000 },
 
 };
 
 		break;
 	case SUPPORT_1000MHZ:
 		for_1000 = true;
-		max_support_idx = L6;
+		max_support_idx = L2;
 		break;
 	default:
 		for_1000 = true;
-		max_support_idx = L6;
+		max_support_idx = L2;
 		break;
 	}
-	//disable "artificial" frequencies -gm
-	exynos4210_freq_table[L0].frequency = CPUFREQ_ENTRY_INVALID; //1600MHz
-	exynos4210_freq_table[L1].frequency = CPUFREQ_ENTRY_INVALID; //1500MHz
-	exynos4210_freq_table[L3].frequency = CPUFREQ_ENTRY_INVALID; //1300MHz
-	exynos4210_freq_table[L5].frequency = CPUFREQ_ENTRY_INVALID; //1100MHz
-	exynos4210_freq_table[L7].frequency = CPUFREQ_ENTRY_INVALID; //900MHz
-	exynos4210_freq_table[L9].frequency = CPUFREQ_ENTRY_INVALID; //700MHz
-	exynos4210_freq_table[L10].frequency = CPUFREQ_ENTRY_INVALID; //600MHz
-	exynos4210_freq_table[L12].frequency = CPUFREQ_ENTRY_INVALID; //400MHz
-	exynos4210_freq_table[L13].frequency = CPUFREQ_ENTRY_INVALID; //300MHz
-	exynos4210_freq_table[L15].frequency = CPUFREQ_ENTRY_INVALID; //100MHz
-	exynos4210_freq_table[L16].frequency = CPUFREQ_ENTRY_INVALID; //50MHz
-	exynos4210_freq_table[L17].frequency = CPUFREQ_ENTRY_INVALID; //25MHz
 
 	/*
 	 * If ASV group is S, can not support 1.4GHz
 //		exynos4210_freq_table[L0].frequency = CPUFREQ_ENTRY_INVALID;
 
 	if (for_1000)
-		exynos4210_freq_table[L4].frequency = CPUFREQ_ENTRY_INVALID;
+		exynos4210_freq_table[L1].frequency = CPUFREQ_ENTRY_INVALID;
 
 	printk(KERN_INFO "DVFS : VDD_ARM Voltage table set with %d Group\n", asv_group);
 
 	}
 
 	info->mpll_freq_khz = rate;
-	info->pm_lock_idx = L8;
-	info->pll_safe_idx = L6;
+	info->pm_lock_idx = L3;
+	info->pll_safe_idx = L2;
 	info->max_support_idx = max_support_idx;
 	info->min_support_idx = min_support_idx;
 	info->cpu_clk = cpu_clk;
 	info->freq_table = exynos4210_freq_table;
 	info->set_freq = exynos4210_set_frequency;
 	info->need_apll_change = exynos4210_pms_change;
-	info->max_current_idx = L4;
-	info->min_current_idx = L14;
+	info->max_current_idx = L1;
+	info->min_current_idx = L5;
 	
 	return 0;
 

arch/arm/mach-exynos/cpufreq.c

 
 #if defined(CONFIG_CPU_EXYNOS4210)
 	/* Do NOT step up max arm clock directly to reduce power consumption */
-	if (index <= L4 && old_index > L8)
-		index = L8;
+	if (index <= L1 && old_index > 3)
+		index = 3;
 #endif
 
 	freqs.new = freq_table[index].frequency;
 	freq_table = exynos_info->freq_table;
 
 	//prevent locking to a freq higher than stock freq unless overclocked -gm
-	cpufreq_level = max( min(exynos_info->max_current_idx, exynos_info->pm_lock_idx) ,
+	cpufreq_level = max( min(exynos_info->max_current_idx, L3) ,
 							(int)cpufreq_level);
 
 	mutex_lock(&set_cpu_freq_lock);
 ssize_t store_UV_mV_table(struct cpufreq_policy *policy,
                                       const char *buf, size_t count)
 {
+	unsigned int ret = -EINVAL;
 	int i = 0;
 	int j = 0;
-	int u[18] = { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } , stepcount = 0, tokencount = 0;
+	int u[6];
 
-	if(count < 1) return -EINVAL;
-
-	//parse input... time to miss strtok... -gm
-	for(j = 0; i < count; i++)
-	{
-		char c = buf[i];
-		if(c >= '0' && c <= '9')
-		{
-			if(tokencount < j + 1) tokencount = j + 1;
-			u[j] *= 10;
-			u[j] += (c - '0');
-		}
-		else if(c == ' ' || c == '\t')
-		{
-			if(u[j] != 0)
-			{
-				j++;
-			}
-		}
-		else
-			break;
-	}
-	
-	//find number of available steps
-	for(i = exynos_info->max_support_idx; i<=exynos_info->min_support_idx; i++)
-	{
-		if(exynos_info->freq_table[i].frequency==CPUFREQ_ENTRY_INVALID) continue;
-		stepcount++;
-	}
-	//do not keep backward compatibility for scripts this time.
-	//I want the number of tokens to be exactly the same with stepcount -gm
-	if(stepcount != tokencount) return -EINVAL;
-	
-	//we have u[0] starting from the first available frequency to u[stepcount]
-	//that is why we use an additiona j here...
-	for(j=0, i = exynos_info->max_support_idx; i<=exynos_info->min_support_idx; i++)
-	{
-		if(exynos_info->freq_table[i].frequency==CPUFREQ_ENTRY_INVALID) continue;
-		if (u[j] > CPU_UV_MV_MAX / 1000)
-		{
-			u[j] = CPU_UV_MV_MAX / 1000;
-		}
-		else if (u[j] < CPU_UV_MV_MIN / 1000)
-		{
-			u[j] = CPU_UV_MV_MIN / 1000;
+	//the following 8 step parsing is only for backward compatibility with old scripts
+	int tmp1, tmp2;
+	ret = sscanf(buf, "%d %d %d %d %d %d %d %d", &tmp1, &u[0], &u[1], &u[2], &u[3], &u[4], &u[5], &tmp2);
+	if( ret == 8 ) ret = 6;
+	else
+	//end backward compatibility change
+	ret = sscanf(buf, "%d %d %d %d %d %d", &u[0], &u[1], &u[2], &u[3], &u[4], &u[5]);
+	if(ret != 6) {
+		ret = sscanf(buf, "%d %d %d %d %d", &u[0], &u[1], &u[2], &u[3], &u[4]);
+		if(ret != 5) {
+			ret = sscanf(buf, "%d %d %d %d", &u[0], &u[1], &u[2], &u[3]);
+			if( ret != 4) return -EINVAL;
 		}
-		exynos_info->volt_table[i] = u[j]*1000;
-		j++;
 	}
-	return count;
-}
 
-ssize_t store_available_freqs_exynos4210(struct cpufreq_policy *policy,
-		     const char *buf, size_t count)
-{
-	int u[18] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
-	int f[18] = {1600,1500,1400,1300,1200,1100,1000,900,800,700,600,500,400,300,200,100,50,25};
-	int i, j, tokencount = 0, ret = 0;
-	
-	if(count < 1) return -EINVAL;
-
-	//parse input
-	for(j = 0; i < count; i++)
+	for( i = 0; i < 6; i++ )
 	{
-		char c = buf[i];
-		if(c >= '0' && c <= '9')
+		if (u[i] > CPU_UV_MV_MAX / 1000)
 		{
-			if(tokencount < j + 1) tokencount = j + 1;
-			u[j] *= 10;
-			u[j] += (c - '0');
+			u[i] = CPU_UV_MV_MAX / 1000;
 		}
-		else if(c == ' ' || c == '\t')
+		else if (u[i] < CPU_UV_MV_MIN / 1000)
 		{
-			if(u[j] != 0)
-			{
-				j++;
-			}
+			u[i] = CPU_UV_MV_MIN / 1000;
 		}
-		else
-			break;
-	}
-
-	//we need at least 3 steps (1000 800 500)
-	if( tokencount < 3 ) return -EINVAL;
-	//we need 1000, 800 and 500MHz steps...
-	ret = 0;
-	for(i = 0; i < 18; i++)
-	{
-		if( u[i] == 1000 || u[i] == 800 || u[i] == 500 ) ret += u[i];
 	}
-	if( ret != 2300 ) return -EINVAL;
 
-	//we want freqs sorted
-	for(i = 1; i < 18; i++)
+	for( i = 6 - ret; i < 6; i++)
 	{
-		if( u[i] > u[i-1] ) return -EINVAL;
-	}
-
-	//validate
-	for(j=0, i = 0; i < 18; i++) 
-	{
-		if(j < 18 )
-			while( u[i] != f[j] )
-			{
-				f[j] = CPUFREQ_ENTRY_INVALID;
-				j++;
-				if( j == 18 ) break;
-			}
-		if( j == 18 ) break; //freq not found
-		f[j] = f[j] * 1000;
-		j++;
+		exynos_info->volt_table[i] = u[i]*1000;
 	}
-	if(i < 18)
-		if( u[i] != 0 ) return -EINVAL; //means we have an invalid freq
-	if( j != 18 ) return -EINVAL; //should not happen but just in case
-
-	//apply
-	ret = exynos_cpufreq_lock(DVFS_LOCK_ID_PM,
-				   exynos_info->pm_lock_idx);
-	if (ret < 0) return -EINVAL;
-	ret = exynos_cpufreq_upper_limit(DVFS_LOCK_ID_PM,
-					exynos_info->pm_lock_idx);
-	if (ret < 0) return -EINVAL;
-	exynos_cpufreq_disable = true;
-
-	for(i = 0; i < 18; i++) 
-	{
-		exynos_info->freq_table[i].frequency = f[i];
-	}
-	cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table);
-	policy->max = exynos_info->freq_table[exynos_info->max_current_idx].frequency;
-	policy->min = exynos_info->freq_table[exynos_info->min_current_idx].frequency;
-
-	exynos_cpufreq_lock_free(DVFS_LOCK_ID_PM);
-	exynos_cpufreq_upper_limit_free(DVFS_LOCK_ID_PM);
-	exynos_cpufreq_disable = false;
-
 	return count;
 }
-

drivers/cpufreq/cpufreq_stats.c

 #include <linux/notifier.h>
 #include <asm/cputime.h>
 
-//I will change this if I can find a better way...
-//but for now, I have to make this because recreating sysfs causes FC on ActivityManager
-#define GM_DIRTY_CPUSTAT_HACKS
-
 static spinlock_t cpufreq_stats_lock;
 
 #define CPUFREQ_STATDEVICE_ATTR(_name, _mode, _show) \
 	ssize_t len = 0;
 	int i;
 	struct cpufreq_stats *stat = per_cpu(cpufreq_stats_table, policy->cpu);
-#ifdef GM_DIRTY_CPUSTAT_HACKS
-	struct cpufreq_frequency_table *table = cpufreq_frequency_get_table(policy->cpu);
-#endif
 	if (!stat)
 		return 0;
 	cpufreq_stats_update(stat->cpu);
-
 	for (i = 0; i < stat->state_num; i++) {
-#ifdef GM_DIRTY_CPUSTAT_HACKS
-		if(table[i].frequency == CPUFREQ_ENTRY_INVALID) continue;
-#endif
 		len += sprintf(buf + len, "%u %llu\n", stat->freq_table[i],
 			(unsigned long long)
 			cputime64_to_clock_t(stat->time_in_state[i]));
 		count++;
 	}
 
-#ifdef GM_DIRTY_CPUSTAT_HACKS
-	count = 18;
-#endif
 	alloc_size = count * sizeof(int) + count * sizeof(cputime64_t);
 
 #ifdef CONFIG_CPU_FREQ_STAT_DETAILS
 	stat->trans_table = stat->freq_table + count;
 #endif
 	j = 0;
-//another temporary hack
-#ifdef GM_DIRTY_CPUSTAT_HACKS
-stat->freq_table[0] = 1600000;
-stat->freq_table[1] = 1500000;
-stat->freq_table[2] = 1400000;
-stat->freq_table[3] = 1300000;
-stat->freq_table[4] = 1200000;
-stat->freq_table[5] = 1100000;
-stat->freq_table[6] = 1000000;
-stat->freq_table[7] = 900000;
-stat->freq_table[8] = 800000;
-stat->freq_table[9] = 700000;
-stat->freq_table[10] = 600000;
-stat->freq_table[11] = 500000;
-stat->freq_table[12] = 400000;
-stat->freq_table[13] = 300000;
-stat->freq_table[14] = 200000;
-stat->freq_table[15] = 100000;
-stat->freq_table[16] = 50000;
-stat->freq_table[17] = 25000;
-j = 18;
-#else
 	for (i = 0; table[i].frequency != CPUFREQ_TABLE_END; i++) {
 		unsigned int freq = table[i].frequency;
 		if (freq == CPUFREQ_ENTRY_INVALID)
 		if (freq_table_get_index(stat, freq) == -1)
 			stat->freq_table[j++] = freq;
 	}
-#endif
 	stat->state_num = j;
 	spin_lock(&cpufreq_stats_lock);
 	stat->last_time = get_jiffies_64();

drivers/cpufreq/freq_table.c

 	return count;
 
 }
-#if defined(CONFIG_CPU_EXYNOS4210)
-extern ssize_t store_available_freqs_exynos4210(struct cpufreq_policy *policy,
-		     const char *buf, size_t count);
-#endif
-
-static ssize_t store_available_freqs(struct cpufreq_policy *policy,
-		     const char *buf, size_t count)
-{
-#if defined(CONFIG_CPU_EXYNOS4210)
-	return store_available_freqs_exynos4210(policy, buf, count);
-#else
-	return count;
-#endif
-}
 
 struct freq_attr cpufreq_freq_attr_scaling_available_freqs = {
 	.attr = { .name = "scaling_available_frequencies",
-		  .mode = 0644,
+		  .mode = 0444,
 		},
 	.show = show_available_freqs,
-	.store = store_available_freqs,
 };
 EXPORT_SYMBOL_GPL(cpufreq_freq_attr_scaling_available_freqs);