gb_emulator / tests / emulator_tests / cpu_test.cpp

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/*  Copyright Š 2011 Chris Spencer <spencercw@gmail.com>

    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#include <gmock/gmock.h>
#include <gtest/gtest.h>

#include <gb_emulator/gb_cpu.h>
#include <gb_emulator/gb_memory.h>

using namespace testing;

class MockGbMemory: public GbMemory
{
public:
	MOCK_METHOD0(reset, void ());
	MOCK_CONST_METHOD1(read, uint8_t (uint16_t ptr));
	MOCK_METHOD2(write, void (uint16_t ptr, uint8_t val));
	MOCK_CONST_METHOD0(vram, const uint8_t * ());
	MOCK_METHOD0(vram, uint8_t * ());
	MOCK_CONST_METHOD0(extRam, const uint8_t * ());
	MOCK_METHOD0(extRam, uint8_t * ());
	MOCK_CONST_METHOD0(oam, const uint8_t * ());
	MOCK_METHOD0(oam, uint8_t * ());
	MOCK_CONST_METHOD0(ioPorts, const uint8_t * ());
	MOCK_METHOD0(ioPorts, uint8_t * ());
	MOCK_CONST_METHOD0(ie, uint8_t ());
	MOCK_METHOD1(ie, void (uint8_t value));
	MOCK_CONST_METHOD0(cart, uint8_t ());
	MOCK_METHOD1(cart, void (uint8_t value));
	MOCK_CONST_METHOD0(romBank, uint16_t ());
	MOCK_METHOD1(romBank, void (uint16_t value));
	MOCK_CONST_METHOD0(rtc, const uint8_t * ());
	MOCK_METHOD0(rtc, uint8_t * ());
	MOCK_CONST_METHOD0(hdmaSource, uint16_t ());
	MOCK_METHOD1(hdmaSource, void (uint16_t value));
	MOCK_CONST_METHOD0(hdmaDestination, uint16_t ());
	MOCK_METHOD1(hdmaDestination, void (uint16_t value));
};

class GbCpuTest: public Test
{
public:
	GbCpuTest():
	cpu(memory)
	{
		memset(ioPorts, 0, ::IO_PORTS_SIZE);
		EXPECT_CALL(memory, ioPorts()).WillRepeatedly(Return(ioPorts));
		EXPECT_CALL(memory, ie()).WillRepeatedly(Return(static_cast<uint8_t>('\x00')));
	}

protected:
	MockGbMemory memory;
	GbCpu cpu;
	uint8_t ioPorts[::IO_PORTS_SIZE];
};

TEST_F(GbCpuTest, EightBitLoads)
{
	bool speedSwitch;
	int cycles;
	
	// ld r,s
	// ld d,r
	// ld d,n
	cpu.r.r8[::B]   = 0xab;
	cpu.r.r8[::F]   = 0x00;
	cpu.r.r16[::HL] = 0x1234;
	
	EXPECT_CALL(memory, read(0)).WillOnce(Return('\x78'));   // ld a,b         -- 1 cycle
	EXPECT_CALL(memory, read(1)).WillOnce(Return('\x06'));   // ld a,0xcd      -- 2 cycles
	EXPECT_CALL(memory, read(2)).WillOnce(Return('\xcd'));
	EXPECT_CALL(memory, read(3)).WillOnce(Return('\x4e'));   // ld c,(hl)      -- 2 cycles
	EXPECT_CALL(memory, read(0x1234)).WillOnce(Return('\xef'));
	EXPECT_CALL(memory, read(4)).WillOnce(Return('\x77'));   // ld (hl),a      -- 2 cycles
	EXPECT_CALL(memory, write(0x1234, 0xab));
	EXPECT_CALL(memory, read(5)).WillOnce(Return('\x36'));   // ld (hl),0x12   -- 3 cycles
	EXPECT_CALL(memory, read(6)).WillOnce(Return('\x12'));
	EXPECT_CALL(memory, write(0x1234, 0x12));

	cycles = cpu.poll(10, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(10, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\xab'), cpu.r.r8[::A]);
	ASSERT_EQ(static_cast<uint8_t>('\xcd'), cpu.r.r8[::B]);
	ASSERT_EQ(static_cast<uint8_t>('\xef'), cpu.r.r8[::C]);
	ASSERT_EQ(static_cast<uint8_t>('\x00'), cpu.r.r8[::F]);
	
	// ld a,(ss)
	// ld (dd),a
	cpu.r.r16[::BC] = 0x5678;

	EXPECT_CALL(memory, read(7)).WillOnce(Return('\xfa'));   // ld a,(0xabcd)  -- 4 cycles
	EXPECT_CALL(memory, read(8)).WillOnce(Return('\xcd'));
	EXPECT_CALL(memory, read(9)).WillOnce(Return('\xab'));
	EXPECT_CALL(memory, read(0xabcd)).WillOnce(Return('\x34'));
	EXPECT_CALL(memory, read(10)).WillOnce(Return('\x02'));  // ld (bc),a      -- 2 cycles
	EXPECT_CALL(memory, write(0x5678, 0x34));
	EXPECT_CALL(memory, read(11)).WillOnce(Return('\xea'));  // ld (0x4321),a  -- 4 cycles
	EXPECT_CALL(memory, read(12)).WillOnce(Return('\x21'));
	EXPECT_CALL(memory, read(13)).WillOnce(Return('\x43'));
	EXPECT_CALL(memory, write(0x4321, 0x34));

	cycles = cpu.poll(10, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(10, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x34'), cpu.r.r8[::A]);
	ASSERT_EQ(static_cast<uint8_t>('\x00'), cpu.r.r8[::F]);
	
	// ldh a,(c)
	// ldh (c),a
	EXPECT_CALL(memory, read(14)).WillOnce(Return('\xf2'));  // ldh a,(c)      -- 2 cycles
	EXPECT_CALL(memory, read(0xff78)).WillOnce(Return('\x56'));
	EXPECT_CALL(memory, read(15)).WillOnce(Return('\xe2'));  // ldh (c),a      -- 2 cycles
	EXPECT_CALL(memory, write(0xff78, 0x56));

	cycles = cpu.poll(4, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(4, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x56'), cpu.r.r8[::A]);
	ASSERT_EQ(static_cast<uint8_t>('\x00'), cpu.r.r8[::F]);

	// ldh a,(n)
	// ldh (n),a
	EXPECT_CALL(memory, read(16)).WillOnce(Return('\xf0'));  // ldh a,(0x21)   -- 3 cycles
	EXPECT_CALL(memory, read(17)).WillOnce(Return('\x21'));
	EXPECT_CALL(memory, read(0xff21)).WillOnce(Return('\x43'));
	EXPECT_CALL(memory, read(18)).WillOnce(Return('\xe0'));  // ldh (0x22),a   -- 3 cycles
	EXPECT_CALL(memory, read(19)).WillOnce(Return('\x22'));
	EXPECT_CALL(memory, write(0xff22, 0x43));

	cycles = cpu.poll(6, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(6, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x43'), cpu.r.r8[::A]);
	ASSERT_EQ(static_cast<uint8_t>('\x00'), cpu.r.r8[::F]);

	// ldd a,(hl)
	// ldd (hl),a
	EXPECT_CALL(memory, read(20)).WillOnce(Return('\x3a'));  // ldd a,(hl)     -- 2 cycles
	EXPECT_CALL(memory, read(0x1234)).WillOnce(Return('\x78'));
	EXPECT_CALL(memory, read(21)).WillOnce(Return('\x32'));  // ldd (hl),a     -- 2 cycles
	EXPECT_CALL(memory, write(0x1233, 0x78));

	cycles = cpu.poll(4, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(4, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x78'), cpu.r.r8[::A]);
	ASSERT_EQ(static_cast<uint8_t>('\x00'), cpu.r.r8[::F]);
	ASSERT_EQ(0x1232, cpu.r.r16[::HL]);

	// ldi a,(hl)
	// ldi (hl),a
	EXPECT_CALL(memory, read(22)).WillOnce(Return('\x2a'));  // ldi a,(hl)     -- 2 cycles
	EXPECT_CALL(memory, read(0x1232)).WillOnce(Return('\x9a'));
	EXPECT_CALL(memory, read(23)).WillOnce(Return('\x22'));  // ldi (hl),a     -- 2 cycles
	EXPECT_CALL(memory, write(0x1233, 0x9a));

	cycles = cpu.poll(4, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(4, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x9a'), cpu.r.r8[::A]);
	ASSERT_EQ(static_cast<uint8_t>('\x00'), cpu.r.r8[::F]);
	ASSERT_EQ(0x1234, cpu.r.r16[::HL]);
}

TEST_F(GbCpuTest, SixteenBitLoads)
{
	bool speedSwitch;
	int cycles;
	
	// ld dd,nn
	// ld (nn),sp
	// ld sp,hl
	cpu.r.r8[::F]   = 0xf0;
	cpu.r.r16[::HL] = 0x8765;
	cpu.sp          = 0x9876;
	
	EXPECT_CALL(memory, read(0)).WillOnce(Return('\x01'));   // ld bc,nn       -- 3 cycles
	EXPECT_CALL(memory, read(1)).WillOnce(Return('\x67'));
	EXPECT_CALL(memory, read(2)).WillOnce(Return('\x45'));
	EXPECT_CALL(memory, read(3)).WillOnce(Return('\x08'));   // ld (nn),sp     -- 5 cycles
	EXPECT_CALL(memory, read(4)).WillOnce(Return('\x78'));
	EXPECT_CALL(memory, read(5)).WillOnce(Return('\x56'));
	EXPECT_CALL(memory, write(0x5678, 0x76));
	EXPECT_CALL(memory, write(0x5679, 0x98));
	EXPECT_CALL(memory, read(6)).WillOnce(Return('\xf9'));   // ld sp,hl       -- 2 cycles

	cycles = cpu.poll(10, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(10, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\xf0'), cpu.r.r8[::F]);
	ASSERT_EQ(0x4567, cpu.r.r16[::BC]);
	ASSERT_EQ(0x8765, cpu.sp);

	////////////////////////////////////////////////////////////////////////////////////////////////
	// ld hl,(sp+n) -- We have several tests here to verify the correct behaviour of the carry and
	// half-carry flags

	// ld hl,(0x0040-7)
	cpu.r.r8[::F] = ::Z | ::N;
	cpu.sp        = 0x0040;

	EXPECT_CALL(memory, read(7)).WillOnce(Return('\xf8'));   // ld hl,(sp-7)   -- 3 cycles
	EXPECT_CALL(memory, read(8)).WillOnce(Return('\xf9'));

	cycles = cpu.poll(3, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(3, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x20'), cpu.r.r8[::F]);
	ASSERT_EQ(0x0039, cpu.r.r16[::HL]);

	// ld hl,(0x0040+0)
	cpu.r.r8[::F] = 0;
	cpu.sp        = 0x0040;

	EXPECT_CALL(memory, read(9)).WillOnce(Return('\xf8'));   // ld hl,(sp+0)   -- 3 cycles
	EXPECT_CALL(memory, read(10)).WillOnce(Return('\x00'));

	cycles = cpu.poll(3, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(3, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x00'), cpu.r.r8[::F]);
	ASSERT_EQ(0x0040, cpu.r.r16[::HL]);

	// ld hl,(0x0040+7)
	cpu.r.r8[::F] = 0;
	cpu.sp        = 0x0040;

	EXPECT_CALL(memory, read(11)).WillOnce(Return('\xf8'));  // ld hl,(sp+7)   -- 3 cycles
	EXPECT_CALL(memory, read(12)).WillOnce(Return('\x07'));

	cycles = cpu.poll(3, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(3, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x00'), cpu.r.r8[::F]);
	ASSERT_EQ(0x0047, cpu.r.r16[::HL]);

	// ld hl,(0x0040-128)
	cpu.r.r8[::F] = 0;
	cpu.sp        = 0x0040;

	EXPECT_CALL(memory, read(13)).WillOnce(Return('\xf8'));  // ld hl,(sp-128) -- 3 cycles
	EXPECT_CALL(memory, read(14)).WillOnce(Return('\x80'));

	cycles = cpu.poll(3, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(3, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x10'), cpu.r.r8[::F]);
	ASSERT_EQ(0xffc0, cpu.r.r16[::HL]);

	// ld hl,(0xffc0+127)
	cpu.r.r8[::F] = 0;
	cpu.sp        = 0xffc0;

	EXPECT_CALL(memory, read(15)).WillOnce(Return('\xf8'));  // ld hl,(sp+127) -- 3 cycles
	EXPECT_CALL(memory, read(16)).WillOnce(Return('\x7f'));

	cycles = cpu.poll(3, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(3, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x30'), cpu.r.r8[::F]);
	ASSERT_EQ(0x003f, cpu.r.r16[::HL]);

	// ld hl,(0x0ff0+127)
	cpu.r.r8[::F] = 0;
	cpu.sp        = 0x0ff0;

	EXPECT_CALL(memory, read(17)).WillOnce(Return('\xf8'));  // ld hl,(sp+127) -- 3 cycles
	EXPECT_CALL(memory, read(18)).WillOnce(Return('\x7f'));

	cycles = cpu.poll(3, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(3, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x20'), cpu.r.r8[::F]);
	ASSERT_EQ(0x106f, cpu.r.r16[::HL]);

	// ld hl,(0x1040-128)
	cpu.r.r8[::F] = 0;
	cpu.sp        = 0x1040;

	EXPECT_CALL(memory, read(19)).WillOnce(Return('\xf8'));  // ld hl,(sp-128) -- 3 cycles
	EXPECT_CALL(memory, read(20)).WillOnce(Return('\x80'));

	cycles = cpu.poll(3, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(3, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x00'), cpu.r.r8[::F]);
	ASSERT_EQ(0x0fc0, cpu.r.r16[::HL]);

	////////////////////////////////////////////////////////////////////////////////////////////////

	// push ss
	cpu.r.r8[::F] = 0xf0;
	cpu.r.r16[DE] = 0x3456;
	cpu.sp        = 0x4567;

	EXPECT_CALL(memory, read(21)).WillOnce(Return('\xd5'));  // push de        -- 4 cycles
	EXPECT_CALL(memory, write(0x4566, 0x34));
	EXPECT_CALL(memory, write(0x4565, 0x56));

	cycles = cpu.poll(4, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(4, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\xf0'), cpu.r.r8[::F]);
	ASSERT_EQ(0x4565, cpu.sp);

	// pop ss
	cpu.sp        = 0x5678;

	EXPECT_CALL(memory, read(22)).WillOnce(Return('\xe1'));  // pop hl         -- 3 cycles
	EXPECT_CALL(memory, read(0x5678)).WillOnce(Return('\x45'));
	EXPECT_CALL(memory, read(0x5679)).WillOnce(Return('\x23'));

	cycles = cpu.poll(3, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(3, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\xf0'), cpu.r.r8[::F]);
	ASSERT_EQ(0x2345, cpu.r.r16[::HL]);
	ASSERT_EQ(0x567a, cpu.sp);
}

TEST_F(GbCpuTest, EightBitArithmetic)
{
	// TODO
}

TEST_F(GbCpuTest, SixteenBitArithmetic)
{
	// TODO
}

TEST_F(GbCpuTest, MiscellaneousInstructions)
{
	bool speedSwitch;
	int cycles;
	
	////////////////////////////////////////////////////////////////////////////////////////////////
	// swap s

	// swap 0x00
	cpu.r.r8[::A] = 0x00;
	cpu.r.r8[::F] = 0xf0;
	
	EXPECT_CALL(memory, read(0)).WillOnce(Return('\xcb'));   // swap a         -- 2 cycles
	EXPECT_CALL(memory, read(1)).WillOnce(Return('\x37'));

	cycles = cpu.poll(2, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(2, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x00'), cpu.r.r8[::A]);
	ASSERT_EQ(static_cast<uint8_t>('\x80'), cpu.r.r8[::F]);

	// swap 0xcd
	cpu.r.r8[::A] = 0xcd;
	cpu.r.r8[::F] = 0xf0;
	
	EXPECT_CALL(memory, read(2)).WillOnce(Return('\xcb'));   // swap a         -- 2 cycles
	EXPECT_CALL(memory, read(3)).WillOnce(Return('\x37'));

	cycles = cpu.poll(2, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(2, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\xdc'), cpu.r.r8[::A]);
	ASSERT_EQ(static_cast<uint8_t>('\x00'), cpu.r.r8[::F]);

	// swap (hl)
	cpu.r.r8[::F]   = 0xf0;
	cpu.r.r16[::HL] = 0x6789;
	
	EXPECT_CALL(memory, read(4)).WillOnce(Return('\xcb'));   // swap (hl)      -- 4 cycles
	EXPECT_CALL(memory, read(5)).WillOnce(Return('\x36'));
	EXPECT_CALL(memory, read(0x6789)).WillOnce(Return('\xcd'));
	EXPECT_CALL(memory, write(0x6789, 0xdc));

	cycles = cpu.poll(4, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(4, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x00'), cpu.r.r8[::F]);

	////////////////////////////////////////////////////////////////////////////////////////////////

	// cpl
	cpu.r.r8[::A] = 0xaa;
	cpu.r.r8[::F] = 0x90;
	
	EXPECT_CALL(memory, read(6)).WillOnce(Return('\x2f'));   // cpl            -- 1 cycle

	cycles = cpu.poll(1, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(1, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x55'), cpu.r.r8[::A]);
	ASSERT_EQ(static_cast<uint8_t>('\xf0'), cpu.r.r8[::F]);

	// ccf
	cpu.r.r8[::F] = 0xf0;
	
	EXPECT_CALL(memory, read(7)).WillOnce(Return('\x3f'));   // ccf            -- 1 cycle

	cycles = cpu.poll(1, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(1, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x80'), cpu.r.r8[::F]);

	// scf
	cpu.r.r8[::F] = 0xe0;
	
	EXPECT_CALL(memory, read(8)).WillOnce(Return('\x37'));   // scf            -- 1 cycle

	cycles = cpu.poll(1, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(1, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\x90'), cpu.r.r8[::F]);

	// nop
	cpu.r.r8[::F] = 0xf0;
	
	EXPECT_CALL(memory, read(9)).WillOnce(Return('\x00'));   // nop            -- 1 cycle

	cycles = cpu.poll(1, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(1, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\xf0'), cpu.r.r8[::F]);

	////////////////////////////////////////////////////////////////////////////////////////////////
	// halt

	// Verify the CPU stops
	EXPECT_CALL(memory, read(10)).WillOnce(Return('\x76'));  // halt           -- 1 cycle

	cycles = cpu.poll(2, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(2, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\xf0'), cpu.r.r8[::F]);

	// Flag an interrupt and verify the CPU does NOT continue because the interrupt is masked out
	ioPorts[::IF] |= ::VBLANK_INTR;

	cycles = cpu.poll(1, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(1, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\xf0'), cpu.r.r8[::F]);

	// Unmask the interrupt with the IME disabled and verify the CPU continues in place
	EXPECT_CALL(memory, ie()).WillRepeatedly(Return(static_cast<uint8_t>(::VBLANK_INTR)));

	EXPECT_CALL(memory, read(11)).WillOnce(Return('\x00'));  // nop            -- 1 cycle

	cycles = cpu.poll(1, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(1, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\xf0'), cpu.r.r8[::F]);

	// Halt the CPU once again
	EXPECT_CALL(memory, read(12)).WillOnce(Return('\x76'));  // halt           -- 1 cycle

	cycles = cpu.poll(2, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(2, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\xf0'), cpu.r.r8[::F]);

	// Enable the master interrupt flag and verify the CPU jumps to the interrupt handler
	cpu.ime = ::IME_ENABLED;
	cpu.pc = 0x1234;
	cpu.sp = 0xabcd;

	EXPECT_CALL(memory, write(0xabcc, 0x12));
	EXPECT_CALL(memory, write(0xabcb, 0x34));
	EXPECT_CALL(memory, read(0x40)).WillOnce(Return('\x00'));

	cycles = cpu.poll(1, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(1, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\xf0'), cpu.r.r8[::F]);

	////////////////////////////////////////////////////////////////////////////////////////////////
	// stop

	// Verify the CPU stops
	cpu.pc = 0;

	EXPECT_CALL(memory, read(0)).WillOnce(Return('\x10'));   // stop           -- 1 cycle

	cycles = cpu.poll(2, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(2, cycles);
	ASSERT_EQ(static_cast<uint8_t>('\xf0'), cpu.r.r8[::F]);

	// Verify the CPU does not attempt to check for any interrupts
	EXPECT_CALL(memory, ioPorts()).Times(0);
	EXPECT_CALL(memory, ie()).Times(0);

	cycles = cpu.poll(1, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(1, cycles);

	// Manually bring the CPU out of stop mode (this is usually done by the input manager) and
	// verify the CPU continues correctly
	EXPECT_CALL(memory, ioPorts()).WillRepeatedly(Return(ioPorts));
	EXPECT_CALL(memory, ie()).WillRepeatedly(Return(static_cast<uint8_t>('\0')));
	cpu.stop = false;

	EXPECT_CALL(memory, read(1)).WillOnce(Return('\x00'));   // nop            -- 1 cycle

	cycles = cpu.poll(1, speedSwitch);
	ASSERT_FALSE(speedSwitch);
	ASSERT_EQ(1, cycles);
}

TEST_F(GbCpuTest, Daa)
{
	bool speedSwitch;
	int cycles;

	for (unsigned i = 0; i != 0x800; ++i)
	{
		// Calculate what the value should be
		uint8_t a = static_cast<uint8_t>(i);
		uint8_t f =
			(a & 0x100 ? ::N  : 0) |
			(a & 0x200 ? ::HF : 0) |
			(a & 0x400 ? ::CF : 0);
		uint8_t fOut = f & ::N;

		uint8_t correction = 0x00;
		if (a > 0x99 || (f & ::CF))
		{
			correction = 0x60;
			fOut |= ::CF;
		}
		else
		{
			fOut &= ~::CF;
		}

		if ((a & 0x0f) > 9 || (f & ::HF))
		{
			correction |= 0x06;
		}

		uint8_t result = a;
		if (f & ::N)
		{
			result -= correction;
		}
		else
		{
			result += correction;
		}

		if ((a ^ result) & 0x10)
		{
			fOut |= ::HF;
		}
		if (!result)
		{
			fOut |= ::Z;
		}

		// Run it through the emulator
		cpu.r.r8[::A] = a;
		cpu.r.r8[::F] = f;
		cpu.pc        = 0;

		EXPECT_CALL(memory, read(0)).WillOnce(Return('\x27'));  // daa -- 1 cycle

		cycles = cpu.poll(1, speedSwitch);
		ASSERT_FALSE(speedSwitch);
		ASSERT_EQ(1, cycles);
		ASSERT_EQ(result, cpu.r.r8[::A]);
		ASSERT_EQ(fOut, cpu.r.r8[::F]);
	}
}
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