Grain /

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The Grain stream cipher is one of the phase 3 candidates of the eSTREAM project: 

The main strength of Grain is its small hardware footprint. For example, on a Xilinx the stream cipher can be implemented using less than 50 slices. 


- Implementations of both Grain-1 and Grain-128 
- Includes VHDL code and testbenches 
- Uses pure VHDL'93 with no architecture dependent constructs. 
- Push-button synthesis on all major devices. 
- Each stream cipher is implemented in a small and a fast version.