Commits

Sven Hager  committed ef026b2

Implemented INT_SUB.

  • Participants
  • Parent commits af1bd77
  • Branches ppc-jit-backend

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Files changed (2)

File pypy/jit/backend/ppc/ppcgen/opassembler.py

             self.mc.addi(res.value, l0.value, l1.value)
         else:
             self.mc.add(res.value, l0.value, l1.value)
+
+    def emit_int_sub(self, op, arglocs, regalloc):
+        l0, l1, res = arglocs
+        if l0.is_imm():
+            self.mc.load_imm(r.r0, l0.value)
+            self.mc.sub(res.value, r.r0.value, l1.value)
+        elif l1.is_imm():
+            self.mc.subi(res.value, l0.value, l1.value)
+        else:
+            print "unten"
+            self.mc.sub(res.value, l0.value, l1.value)
    
     emit_int_le = gen_emit_cmp_op(c.LE)   
 

File pypy/jit/backend/ppc/ppcgen/regalloc.py

         res = self.force_allocate_reg(op.result)
         return locs + [res]
 
+    def prepare_int_sub(self, op):
+        boxes = list(op.getarglist())
+        b0, b1 = boxes
+        imm_b0 = _check_imm_arg(b0)
+        imm_b1 = _check_imm_arg(b1)
+        if not imm_b0 and imm_b1:
+            l0, box = self._ensure_value_is_boxed(b0, boxes)
+            l1 = self.make_sure_var_in_reg(b1, [b0])
+            boxes.append(box)
+        elif imm_b0 and not imm_b1:
+            l0 = self.make_sure_var_in_reg(b0)
+            l1, box = self._ensure_value_is_boxed(b1, boxes)
+            boxes.append(box)
+        else:
+            l0, box = self._ensure_value_is_boxed(b0, boxes)
+            boxes.append(box)
+            l1, box = self._ensure_value_is_boxed(b1, boxes)
+            boxes.append(box)
+        locs = [l0, l1]
+        self.possibly_free_vars(boxes)
+        res = self.force_allocate_reg(op.result)
+        return locs + [res]
+
     def prepare_finish(self, op):
         args = [locations.imm(self.frame_manager.frame_depth)]
         for i in range(op.numargs()):