1. Andrew Jessop Avatar Andrew Jessop
  2. Untitled project
  3. SCSI

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Background

Michael now owns an Apple Macintosh LCIII (Performa 450) computer w/out a SCSI hard drive. Other people on the internet also own these computers, however working SCSI drives are now hard to find (and small in size).

A 'competition' of sorts was created where Michael and I would race to build a usable SCSI-to-new-tech device to get the computer working again. Michael originally wanted a SCSI-USB adaptor. I convinced him to use an SD Card.

The competition has long since past but I am persisting with this project out of interest.
See: Michael's on-going design

Requirements

  1. Act as the boot device for an Apple Mac LCIII
    1. Interface with a 50pin SCSI connector
    2. Fit in the space of a 3.5" HDD space inside an Apple Macintosh LC III or similar
    3. Integrate with the controller of the 53C80 SCSI controller chip in the Macintosh LC III
  2. Only implement a SCSI-2 Fast SCSI, single-ended interface.
  3. Programmable SCSI ID, possibly via jumpers on the board read by the uC
  4. The device shall optionally check parity, enabled and disabled programatically switchable jumper.
  5. The device shall provide termination power.
    1. Some Macs don't provide termination power. See [1]
    2. This enables "loopback" testing of the device without connecting to a SCSI bus.
  6. The device shall support a sustained minimum of 1.5MB/sec sequential transfer rate, optionally up to 4MB/sec (as found in the LC485) sustained sequential transfer rate.
    • For the 4-bit mode, the micro must support the required compute-intensive CRC calculations and also provide DMA support.

Design Decisions

Storage

  • SD Card should be used over any other currently available storage technology because:
    1. USB flash drives are orders of magnitude more complex to integrate with compared to the simple SPI interface of an SD Card
    2. SD Cards are still widely available.
    3. SD Cards are quite physically small.
    4. Since the maximum logical address size of SCSI-2 is 2^32 (4Gb) a 4GB SD card would suit perfectly.

Microcontroller

  • SMD uC parts are difficult to prototype with. This leads to the choice of a 'core module' type board that can be purchased cheaply from eBay and easily integrated.
    • Due to the I/O requirements for the physical SCSI interface, I've gone with an LPC1768 module.
  • The LPC1768 supports:
    • SPI/SSP hardware controller with DMA support for interfacing with the SD Card
    • 512kB Flash & 32kB of SRAM
    • 12-bit ADC for voltage/current measurement
    • USB interface
  • Requires an additional RS232 converter
  • 5v tolerant I/O pins (Vi lpc1768.pdf, pg45)
  • Max Clock speed of 100Mhz. Some restrictions on this if using USB (must be a multiple of 12MHz - either 48MHz or 96MHz. See pg44 of user.manual.lpc1768.pdf for an example).
    • Calcs: M = (Fcco.N)/(2.Fin) = 480MHz.1/2.12MHz. N = 1, M = 20.
    • CCLKCFG = 5. Fcco/Fcpu = 480MHz/96MHz = 5
    • USBCLKCFG = 9. PLL0/10 = 480MHz/10 = 48MHz as required
    • Change FLASHCFG to either 4 (5 clocks/access) or 5 (6 clocks/access).

SCSI Bus Options

  • Do not provide on-board SCSI Bus Termination. As mentioned in the Wikipedia article, many newer drives to not provide bus termination internally. I will use either a passive or active external termination device, which will reduce the number of resistors or resistor networks on the board. Perhaps in a later revision bus termination could be added. Active terminators sell on eBay for around £5 so it isn't really worth the bother of adding one to this board.
  • Provide a TERMPWR to the SCSI bus from +5v via a diode. Consider making this programmatically turned on and off using a MOSFET or small relay. At the minimum it should be jumper configurable.
  • Use/copy the PHY interface provided in AVR based SCSI RAM disk as it is simple, low cost and the design is proven. Could upgrade the PHY on a later revision of the board.
    • This interface will require 2 pins per SCSI IO, of which there are 18. (36 uC pins required)
  • Hardware parity calculator? 74HC280. Given the amount of CPU cycles that should be spare, Don't add a hardware parity checker in the first revision. Implement parity in software and see how the transfer performance goes. If too many CPU cycles are burnt calculating parity (unlikely since Odd parity = 1 if there are an Odd number of bits in D0-D7 that are HIGH) then parity checking can always be skipped until a hardware parity option is added if needed.

Design

Purchasing a Macintosh

Ideally I'd purchase a Macintosh LC 475 over a Macintosh LC III because of:

  • Upgraded CPU from 68030 to 68LC040
  • Higher max video ram (up to 1MB)
  • Faster Hard Drive transfer speeds (5MB/s vs 1MB/s) due to improved Am53C96 SCSI controller chip over the older Am85C80
  • equiv to: Performa 475, Quadra 605
  • Saw a Quadra 605 go on eBay for £49.15 + £12.44 postage + £15.50 import charges = £78 from Evans, Georgia, USA

Resources

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