Roadmap

Here I discuss all the components I intend to realize. Cause there are endless opportunities, I have to concentrate on the most important things I'm interested in:
Building a well designed infrastructure to provide the most flexible platform to realize all imaginable hardware designs.

My primary idea was to build a replacing CPU by an implementation of a soft core in a FPGA. But doing this is not easy for me, since I'm a novice in developing hardware with a description language like VHDL. So, on the way to that goal, I'll do smaller steps and begin a bit smaller project: Building a hardware debugger for the TI-99/4A. (I already had this idea, I was a young school boy.)
So for the first, I'll try to concentrate my thoughts on developing a flexible platform on which I can realize more than a replacement CPU, now then all my ideas I could have in future.

Choosing the right FPGA

The first thing I had to decide was which FPGA fits best for my needs. The device should fulfill following aspects:

• Cheap development environment must be available.
• There must be a IDE available for Linux (or Mac OS, since I hate MS).
• Easy to handle for hobbyists. It should be possible to solder the device on a PCB by hand.
• Have many I/O pins to get full control of CPU (min. twice as much the CPU has), so 128 I/O pins and more would be fine.
• Provide as many programmable logic as possible to implement the most. (Size of internal Block RAM is not really important.)

It took some days of investigation until I found the Wave Share's Core3S500E module. It is based on a FPGA of the Xilinx Spartan-3 Family in a PQ208 package. This package type is a square package with 208 pins (incl. power, clock, JTAG pins, etc.) arranged around it. So it could be possible (for an expert) to solder this device rather to one within a ball grid package where all the pins are underneath. This module is just like an breakout bord for the FPGA. Nearly all (more precisely 116) pins are accessible trough pin headers. Additionally this module has a flash memory on board, in which the configurations can be permanently stored. It also has its own voltage regulators, 50 MHz clock generator, a JTAG header for programming and a bunch of small LEDs. All that on a ca. 55mm x 55mm small footprint.
So I ordered the inexpensive Open3S500E Package B which additionally provides an experimental board with a rich selection of modules, which I'll use for this project.

Hardware features

The features of this adapter are only a few, the most features will be implemented within the FPGA. So I have to take account for three main use cases:

1. Provide additional hardware functionality, configured in the FPGA, for use in parallel with the Texas Instruments TMS9900. It should also be possible to replace some existent hardware (like the Console ROM in the area from >0000 - >1FFF or overlay some address decoders for a more differential address decoding). So this adapter should allow to blend out the console hardware, so the processor can only 'see' the FPGA environment.
2. The FPGA hooks on the console and the processor for scanning the busses or memory and control the CPU. (This use case is important for implementing the hardware debugger project.) The console, as well the processor, can't see the FPGA. But the FPGA should get the option to see everything and get control over all hardware. For doing this the FPGA needs to blend out the processor from the console, so it can take control. This is relatively easy to realize: Just put the TMS9900 in HOLD state, so all lines goes into high-impedance state.
3. Complete replace of the Texas Instruments TMS9900 processor (for creating a FPGA based CPU). This use case is like an additional feature to the second one, which arise from the resulting knowledge I will get out of this project and uses the same hardware. Most of the components, like the debugger, will also be overtaken.

...And of cause (the fourth case) using this adapter without an FPGA, so the mounted CPU should work like it is still kept in its old place.

Minimum Requirements

At first, and this is the main goal, a hardware debugger will be created. The first task to realize this, is to develop a hardware platform that takes the Core3S500E module and adapt this module to the socket of the processor of the TI-99/4A.
Because modern logic runs with low power, I need to translate the logic level from the oldschool 5V TTL to 3.3V LvTTL and back through some level shifter. Additionally this shifters should be able to isolate the processor and the console separately from the FPGA, so the FPGA module can act either as a normal device or as an CPU on the TI-bus. For the case of an absent FPGA module, the drivers interconnected in that way, that the CPU is connected directly to the console and can operate like as it were directly build in the console.
For safety and in case of an absent FPGA (which supplies 3.3V with 800mA), an additional or replacement power supply circuit is needed, to drive lots of components and devices. The replacement supply can be made with a 3.3V regulator with let's say 1.5A, like the AP7362. An additional power supply can support the one which is onboard to the FPGA module. To do this, an additional ciruit is needed to 'OR' the both currencies. You can do this with:

• normal diodes (very high voltage drop ca. 700mV)
• Schottky diodes (less dropping voltage of 300mV, small reverse current of 40µA, cheap)
• ideal diodes, like MAX40200 (even less voltage drop: 85mV @ 1A, smallest reverse current of 3.5µA max., but double the price of a Schottky diode)
• positive voltage ideal diode-OR controller, like the LTC4353 that can ORed together two sources to increase the currency (Expensive controller + needed a fist full of other components so costs are >>6€, but has the lowest voltage drop of 25mV)

Next, for a implementation of a debugger, there are some extra devices needed to communicate with the "outer space":
A display is needed, where data can be displayed on. So my FPGA development environment already contains a LCD module with 128x64 dots. I'll use this one. The second device is something where inputs can be made to control the debugger. So a keyboard is needed, which is also a part of my FPGA development environment and has 16 keys. To store configurations (like list of breakpoints, etc.), I'll take the F-RAM module which comes with the FPGA environment.
To handle all this extra devices with a minimum of FPGA pins, an adapter internal system bus is needed.

Summary of needed features of the adapter board:

• Dual socket for holding the original CPU and the FPGA module
• Level shifting for 5V TTL and 12V CMOS with tristate logic
• Additional power supply for 3.3V / 800mA or replacement power supply for 3.3V / 1.5A
• Extra pin header sockets for following devices:
  • the 128x64 LCD module
  • the 4x4 key pad module
  • the nonvolatile F_RAM memory module
• Device addressing logic for system bus

Maximum Requirements

To make a real sophisticated adapter, which comes like a real "Swiss Army Knife", and is usable by other, it should be more flexible. Therefor there are additional extensions to the minimum requirements.

The biggest extension is the ability to configure and control the debugger in a convenient way. One way to do that is to use the FPGA board as a real device to the TI-99/4A, with its own DSR on board. The TI also needs a monitor software which resides in the same or a different ROM. Going this way, the FPGA adapter should be able to provide software which is stored in paged memory of the TI and let the CPU jump into this code. This software can be permanently stored into the DataFlash module and will be loaded at runtime into a onboard RAM area, which is owned by the FPGA and can be shared with the TI-99/4A. A Backup-Battery Power Switching should be realized, though the RAM can act as a RAM-Disk or (G-)ROM. Controller IC: MAX795 (expensive: >9.00€) or TPS3619-33 (disconnects the backup-battery from internal circuitry, ca. 2.50€, example circuit) or TPS3600D33 (like the TPS3619-33 but with write protection and battery status, ca. 5.00€).
To use this adapter with other systems that works with a TMS9900 processor, it has to be able to handle all interrupt signals. The TI-99/4A uses only one interrupt level, so only one pin of the CPU must be traced. But other systems may use all of the 16 interrupt level, so all four lines have to be watched. For this, it is necessary to install an additional driver on the board for level shifting this signals.
All unused FPGA pins (and all signals of the internal system bus) should be routed to a special pin header socket. This socket can be used for third party extensions and additional custom devices.

Summary of extended features of the adapter board:

• Additional driver for all four interrupt lines
• Additional devices:
  • SRAM owned by FPGA (onboard)
  • Backup-Battery Power Switching
  • socket strips for DataFlash module
• Place pin header sockets for GPIO signal lines

Future Requirements

Another and an additionally way to the Maximum Requirements to configure and control the debugger (instead of do that with a DSR) is to connect another (modern) computer via an USB interface or an extra RS232 interface (which is a bad idea since Macintosh Computers doesn't have one). A special binary protocol will handle all configurations and control.

To be able to really make everything you can imagine, this board needs to have an VGA connector (which is available with the development kit), to be able to implement a video processor core like the TMS9918a or V9938. This connector cannot be multiplexed with other devices for continous displaying, so a few GPIO signals must be reserved for VGA. Depending on available colors to display, there are 8 (= 3/3/2, 256 colors) or 9 (= 3/3/3, 512 colors) GPIO reserved.
Maybe you could also create digital video and output it via HDMI or DVI on modern monitors. The project fpgaarcade and its Replay board, for example, uses a DVI transmitter/video DAC (CH7301C) in combination with a video filter/amplifier (THS7353, alternatively THS7313 / THS7303) for an additional analog transmission of the RGB signals. (All the THS73xx has two analog inputs so that the signals of the TMS9918 can be switched.) Those extra devices helps to reduce the resource consumption of the FPGA and makes it easy to realise, because non of the FPGA IO lines are optimized for a differential pairs layout. Circuit examples can be taken from the circuit diagram of the Replay Board.
TDA19988 is an DVI and HDMI Framer / Transmitter without an analog output (but with audio processing via I2S or S/PDIF), used in BeagleBone Black. Its schematic is very helpful to make your own design. (GitHub repository for the BeagleBoneBlack, Wiki with information about Board Revisions and Changes.)
An other reference design is for TI’s Sitara AM335X Cortex-A8 processor also uses the TDA19988. It is almost the same as of the BeagleBone.
Also possible devices are the SiI 164 or SiI 9022, a PanelLink® transmitter or the AD9889B or TFP410.
But if you want to implement an HDMI interface yourself within the FPGA, you should use a protection device (i.e. IP4786CZ32) to fit the physical specifications to HDMI.
Search your own transmitter device at:

• Analog Devices

At fpgaarcade.com you can find VHDL cores from Arnim Läuger for the TMS9918 VDP and the SN76489 sound generator.

In addition, the expansion board will have interfaces for SPI and I2C so that the WaveShare modules for FRAM and A/D converter or Flash memory can be used. Sample implementations for SPI and I2C cores (also for HDMI) can be found at fpga4fun.

To use this module adapter for stand-alone, with a mounted TMS9900 CPU, a connector for an external 12V power supply and a TIM9904A clock generator (incl. qszillator ciruit) are needed. To generate all types of voltages (12V, 5V, -5V) there are also additional regulators necessary which translates the 12V current into 5V and -5V.

Well, there are, as you can see, many possibilities to extend the module adapter. Therefore an expansion board will be developed in the future, which will contain all these extensions. This expansion board will be connected directly to the main core adapter board, to the TMS9918 VDP and the keyboard pinheader at the same time.

Summary of future features of the adapter board:

• Additional devices:
  • Pin header for USB interface
  • Pin header for an VGA/PS2 connector
  • SPI/I2C (each) pin header for FRAM, Flash or AD converter modules
  • DVI or HDMI connectors for modern displays
• Power plug for external 12V power supply
• Additional voltage regulator for 5V and -5 Volts

Choosing a PCB Manufacturer

This can be another difficult challenge, I think. There are cheap China manufacturers with long delivering time, on the other hand there are some here in Germany but there are up to five times more expensive...
For the first, I will list all manufacturers which are able to produce my design:

All prices are calculated incl. tax for following example configuration: 8 workdays, 5 pieces, 2 layer, Solder Mask, 160x100 mm, FR4, 35 µmCu, 1.6 mm, min. drill = 12 mil (0.300 mm), min. track/space = 6 mil (0.150 mm)
An overview of many manufacturers at www.mikrocontroller.net (german).
PCBShopper has a PCB Price Comparison. Other manufacturers to check: Dirty PCBs or Dirty PCBs

Ideas of FPGA Implementations

(This section should be moved to the Wiki of the softcore99 repository!)
Later, or when there are some people who supports me, it is also possible to implement further devices:

• like co-processors for floating point, graphics, DMA or a specialized GPL processor.
• Realize new hardware expansions, like:
  • memory expansions for CPU or GPL with mapping capabilities, which can be configured to act like an original TI Memory Expansion Card or to bring full throttle by 16bit data bus with no wait states. Or the scratch pad ram can be extended and the rest of the 'normal' memory address space kept untouched.
  • memory devices for CF/SD Cards or a big RAM-Disk
  • new interfaces for RS232 (HDX interface) or USB, which also can do the HDX protocol
  • video graphic unit with an VGA or DVI/HDMI connector
  • Graphical terminal over USB (output for VDP port for >88xx/>8Cxx and keyboard/joystick input)
  • and much more...
• Implement a hardware debugger (see below)

FPGA configuration features for the debugger

Feature list:

• Create a singlestep mechanism for the processor
• Continuously scan the busses of the processor and display their data on a LCD
  
• Realtime software debugging with break options. On a break, the CPU gets in HOLD condition and the debugger shows the point where the exception is happened on the LCD.
  Following break options possible:
  • specific addresses
  • specific opcodes
  • automatically detecting invalid opcodes
• Monitor for observing several memory areas
• BIOS like configuration for the relating FPGA configuration (Options for configuring CPU Memory speed/size, list for breakpoints, etc.)